A VLSI array processor for 16-point FFT. - Moon-Key Lee; Kyung-Wook Shin; Jang-Kyu Lee (IEEE J. Solid State Circuits, 1991)

An Efficient VLSI Implementation of Vector-Radix 2-D DCT using Mesh-Connected 2-D Array. - Kyung-Wook Shin; Heung-Woo Jeon; Yong-Seum Kang (ISCAS, 1994)

A 200-MHz complex number multiplier using redundant binary arithmetic. - Kyung-Wook Shin; Bang-Sup Song; Kantilal Bacrania (IEEE J. Solid State Circuits, 1998)

A Hardware Implementation of SHA3 Hash Processor using Cortex-M0. - Dong-Seong Kim 002; Sang-Hyun Lee; Kyung-Wook Shin (ICEIC, 2019)

A Hardware Implementation of Point Scalar Multiplication on Edwards25519 Curve. - Hyeon-Jun Yang; Kyung-Wook Shin (ICEIC, 2021)

A Hardware Accelerator for High-Speed Computation of Ed25519 and X25519. - Su-Hyeon Lee; Song-Hee Lee; Kyung-Wook Shin (ICEIC, 2025)

A High-Performance Point Scalar Multiplier supporting Edwards25519 and Curve25519 Curves. - Ju-Hyung Lee; Kyung-Wook Shin (ICEIC, 2025)