Software power estimation using IPI(inter-prefetch interval) power model for advanced off-the-shelf processor. - Kyungsu Kang; Jungsoo Kim; Heejun Shim; Chong-Min Kyung (ACM Great Lakes Symposium on VLSI, 2007)

Search Area Selective Reuse Algorithm in Motion Estimation. - Heejun Shim; Kyungsu Kang; Chong-Min Kyung (ICME, 2007)

Fast estimation of software energy consumption using IPI(Inter-Prefetch Interval) energy model. - Jungsoo Kim; Kyungsu Kang; Heejun Shim; Woong Hwangbo; Chong-Min Kyung (VLSI-SoC, 2007)

Temperature- and bus traffic- aware data placement in 3D-stacked cache. - Seunghan Lee; Kyungsu Kang; Chong-Min Kyung (VLSI-SoC, 2010)

Temperature-Aware Integrated DVFS and Power Gating for Executing Tasks With Runtime Distribution. - Kyungsu Kang; Jungsoo Kim; Sungjoo Yoo; Chong-Min Kyung (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010)

Design and management of 3D-stacked NUCA cache for chip multiprocessors. - Jongpil Jung; Kyungsu Kang; Chong-Min Kyung (ACM Great Lakes Symposium on VLSI, 2011)

Thermal-aware energy minimization of 3D-stacked L3 cache with error rate limitation. - Woojin Yun; Kyungsu Kang; Chong-Min Kyung (ISCAS, 2011)

Maximizing throughput of temperature-constrained multi-core systems with 3D-stacked cache memory. - Kyungsu Kang; Jongpil Jung; Sungjoo Yoo; Chong-Min Kyung (ISQED, 2011)

Exploiting maximum throughput in 3D multicore architectures with stacked NUCA cache. - Asim Khan; Kyungsu Kang; Chong-Min Kyung (VLSI-SoC, 2011)

Runtime Power Management of 3-D Multi-Core Architectures Under Peak Power and Temperature Constraints. - Kyungsu Kang; Jungsoo Kim; Sungjoo Yoo; Chong-Min Kyung (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011)

Temperature-aware energy minimization of 3D-stacked L2 DRAM cache through DVFS. - Woojin Yun; Jongpil Jung; Kyungsu Kang; Chong-Min Kyung (ISOCC, 2012)

Cost-effective TSV redundancy configuration. - Jongpil Jung; Kyungsu Kang; Jae-Jin Lee; Youngjun Yoon; Chong-Min Kyung (VLSI-SoC, 2012)

A high-throughput and low-latency interconnection network for multi-core Clusters with 3-D stacked L2 tightly-coupled data memory. - Kyungsu Kang; Luca Benini; Giovanni De Micheli (VLSI-SoC, 2012)

Runtime 3-D stacked cache management for chip-multiprocessors. - Jongpil Jung; Kyungsu Kang; Giovanni De Micheli; Chong-Min Kyung (ISQED, 2013)

Temperature-aware runtime power management for chip-multiprocessors with 3-D stacked cache. - Kyungsu Kang; Giovanni De Micheli; Seunghan Lee; Chong-Min Kyung (ISQED, 2014)

Runtime 3-D stacked cache data management for energy minimization of 3-D chip-multiprocessors. - Seunghan Lee; Kyungsu Kang; Jongpil Jung; Chong-Min Kyung (ISQED, 2014)

THOR: Orchestrated thermal management of cores and networks in 3D many-core architectures. - Jinho Lee; Junwhan Ahn; Kiyoung Choi; Kyungsu Kang (ASP-DAC, 2015)

REDELF: An Energy-Efficient Deadlock-Free Routing for 3D NoCs with Partial Vertical Connections. - Jinho Lee; Kyungsu Kang; Kiyoung Choi (ACM J. Emerg. Technol. Comput. Syst., 2015)

Cost-Effective Design of Mesh-of-Tree Interconnect for Multicore Clusters With 3-D Stacked L2 Scratchpad Memory. - Kyungsu Kang; Luca Benini; Giovanni De Micheli (IEEE Trans. Very Large Scale Integr. Syst., 2015)

Runtime Thermal Management for 3-D Chip-Multiprocessors With Hybrid SRAM/MRAM L2 Cache. - Seunghan Lee; Kyungsu Kang; Chong-Min Kyung (IEEE Trans. Very Large Scale Integr. Syst., 2015)

A power-efficient 3-D on-chip interconnect for multi-core accelerators with stacked L2 cache. - Kyungsu Kang; Sangho Park; Jong-Bae Lee; Luca Benini; Giovanni De Micheli (DATE, 2016)

Hybrid L2 NUCA Design and Management Considering Data Access Latency, Energy Efficiency, and Storage Lifetime. - Seunghan Lee; Kyungsu Kang; Jongpil Jung; Chong-Min Kyung (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Seamless SoC Verification Using Virtual Platforms: An Industrial Case Study. - Kyungsu Kang; Sangho Park; Byeongwook Bae; Jungyun Choi; SungGil Lee; Byunghoon Lee; Jong-Bae Lee (DATE, 2019)

On-chip Interconnect Optimization and Validation using Virtual Platform. - Jungyun Choi; Kyungsu Kang; Sangho Park; Seunghan Lee; YoHan Park; Byeongwook Bae; Byunghoon Lee; ByungChul Yoo (ISOCC, 2020)

Early HW/SW Co-Verification Using Virtual Platforms. - Jungyun Choi; Kyungsu Kang; Byunghoon Lee; Sangho Park; Jae-Woo Im (ISOCC, 2021)

Toward Heterogeneous Virtual Platforms For Early SW Development. - Dongyoung Lee; Kyungsu Kang; Jongseong Park; Byunghoon Lee; Jinbeom Kim; Jae-Woo Im (ISOCC, 2022)

Accelerating RocksDB for small-zone ZNS SSDs by parallel I/O mechanism. - Minwoo Im; Kyungsu Kang; Heonyoung Yeom (Middleware Industry, 2022)