Minimizing total wire length by flipping modules. - Kyunrak Chong; Sartaj Sahni (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993)

Optimal realizations of floorplans [VLSI layout]. - Kyunrak Chong; Sartaj Sahni (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993)

Flipping Modules to Minimize Maximum Wire Length. - Kyunrak Chong; Sartaj Sahni (VLSI Design, 1995)

Correspondence-Based Data Structures for Double-Ended Priority Queues. - Kyunrak Chong; Sartaj Sahni (ACM J. Exp. Algorithmics, 2000)