Utilisation de CHIP pour la synthèse et vérification des circuits CMOS. - Huy Nam Nguyen; L. Ducousso (SPLT, 1988)

Automated synthesis of combinational logic using problem solving techniques. - Huy Nam Nguyen; L. Ducousso (SPLT, 1989)

Logic Synthesis and Verification of the CPU and Caches of a Mainframe System. - Huy Nam Nguyen; J. P. Tual; L. Ducousso; Michel Thill; P. Vallet (EDAC-ETC-EUROASIC, 1994)

The Structured Logic CAD Suite Used on the DPS7000 System. - Huy Nam Nguyen; J. P. Tual; L. Ducousso; Michel Thill; P. Vallet (ICCD, 1994)