Floating-gate EEPROM cell: threshold voltage sensibility to geometry. - Jean-Michel Portal; L. Forli; Didier Née (ISCAS (1), 2002)

Floating-gate EEPROM cell model based on MOS model 9. - Jean-Michel Portal; L. Forli; Didier Née (ISCAS (3), 2002)

An Automated Methodology to Diagnose Geometric Defect in the EEPROM Cell. - Jean-Michel Portal; L. Forli; Hassen Aziza; Didier Née (ITC, 2002)

An Automated Design Methodology for EEPROM Cell (ADE). - Jean-Michel Portal; L. Forli; Hassen Aziza; Didier Née (MTDT, 2002)

Infrastructure IP for Back-End Yield Improvement. - L. Forli; Jean-Michel Portal; Didier Née; Bertrand Borot (ITC, 2003)