Energy Efficient Approximate 4: 2 Compressors for Error Tolerant Applications. - L. Hemanth Krishna; J. Bhaskara Rao 001; Ayesha Sk; Sreehari Veeramachaneni; S. K. Noor Mahammad (ICECS, 2021)

Energy Efficient Approximate Multiplier Design for Image/Video Processing Applications. - L. Hemanth Krishna; J. Bhaskara Rao 001; Ayesha Sk; Sreehari Veeramachaneni; Sk. Noor Mahammad (iSES, 2021)

Efficient design of 15: 4 counter using a novel 5: 3 counter for high-speed multiplication. - L. Hemanth Krishna; Neeharika M.; Vishvanath Janjirala; Sreehari Veeramachaneni; S. K. Noor Mahammad (IET Comput. Digit. Tech., 2021)

High-Speed Serial and Semi-Parallel IMPLY-based Approximate Adders through Memristors for In-Memory Computing. - Nandit Kaushik; L. Hemanth Krishna; Srinivasu Bodapati (ISCAS, 2024)

Energy Efficient Accurate and Approximate Modified Adders for Ternary Multipliers. - L. Hemanth Krishna; Nandit Kaushik; Srinivasu Bodapati (ISCAS, 2024)

Approximate Ternary Matrix Multiplication for Image Processing and Neural Networks. - L. Hemanth Krishna; B. Srinivasu (ISVLSI, 2024)

Energy-Efficient Approximate Multiplier Design With Lesser Error Rate Using the Probability-Based Approximate 4:2 Compressor. - L. Hemanth Krishna; Ayesha Sk; J. Bhaskara Rao 001; Sreehari Veeramachaneni; Sk. Noor Mahammad (IEEE Embed. Syst. Lett., 2024)

Optimizing Multipliers: An Energy-Efficient Design Using a Novel 3: 2 Compressor. - L. Hemanth Krishna; Sreehari Veeramachaneni; Srinivasu Bodapati; Bhaskara Rao Jammu 001; Sk. Noor Mahammad (VLSID, 2025)