A Novel Method for Online In-Place Detection and Location of Multiple Interconnect Faults in SRAM Based FPGAs. - L. Kalyan Kumar; Amol J. Mupid; Aditya S. Ramani; V. Kamakoti 001 (Asian Test Symposium, 2003)

Testable Clock Routing Architecture for Field Programmable Gate Arrays. - L. Kalyan Kumar; Amol J. Mupid; Aditya S. Ramani; V. Kamakoti 001 (FPL, 2003)

On-Line Location of Multiple Faults in LUT Based Reconfigurable Systems. - L. Kalyan Kumar; Aditya S. Ramani; Amol J. Mupid; V. Kamakoti 001; Sivaprakasam Suresh (VLSI, 2003)

Multiple Fault Testing of Logic Resources of SRAM-Based FPGAs. - Saurabh Goyal; Mihir R. Choudhury; S. S. S. P. Rao; L. Kalyan Kumar (VLSI Design, 2005)

Pseudo-online testing methodologies for various components of field programmable gate arrays. - L. Kalyan Kumar; Aditya S. Ramani; Amol J. Mupid; V. Kamakoti 001 (Microprocess. Microsystems, 2005)