Dynamic Input Pruning-Based Low-Power and Error-Optimized Approximate Adder. - Lalit Bandil; Bal Chand Nagar (ICCCNT, 2024)

Modified restoring array-based power efficient approximate square root circuit and its application. - Lalit Bandil; Bal Chand Nagar (Integr., 2024)

Hardware Implementation of Unsigned Approximate Hybrid Square Rooters for Error-Resilient Applications. - Lalit Bandil; Bal Chand Nagar (IEEE Trans. Computers, 2024)

SIEAA: Significant input extraction-based error optimized approximate adder for error resilient application. - Lalit Bandil; Bal Chand Nagar (Integr., 2025)