Low-Voltage Universal Cell (LVUC): A Compact Analog/Digital Logic Block for Mixed Signal FPGAs. - Lalitha Mohana Kalyani-Garimella; Annajirao Garimella; Jaime Ramírez-Angulo; Ramón González Carvajal; Antonio J. López-Martín (CICC, 2006)

Low voltage gain boosting schemes for one stage operational amplifiers. - Jaime Ramírez-Angulo; Annajirao Garimella; Lalitha Mohana Kalyani-Garimella; Milind S. Sawant; Antonio Lopez-Martin; Ramón González Carvajal (ECCTD, 2007)

An Input Stage for the Implementation of Low-Voltage Rail to Rail Offset Compensated CMOS Comparators. - Jaime Ramírez-Angulo; Lalitha Mohana Kalyani-Garimella; Annajirao Garimella; Sri Raga Sudha Garimella; Antonio J. López-Martín; Ramón González Carvajal (VLSI Design, 2008)

New generation carry look twice-ahead adder CL2A and carry look thrice-ahead adder CL3A. - Lalitha Mohana Kalyani-Garimella; Sri Raga Sudha Garimella; Kevin Duda; Eric S. Fetzer (MWSCAS, 2013)

Novel 3D Monotonic Characterization of Standard Cell Liberty File Attributes w.r.t ASIC Tool Flow. - Lalitha Mohana Kalyani-Garimella; Sri Raga Sudha Garimella (MWSCAS, 2019)