Low-power adder design techniques for noise-tolerant applications. - Ihab Nahlus; Lama Shaer; Ali Chehab; Ayman I. Kayssi; Mohammad M. Mansour (SiPS, 2011)

Low-power digital signal processor design for a hearing aid. - Lama Shaer; Ihab Nahlus; Jawad Merhi; Ayman I. Kayssi; Ali Chehab (ICEAC, 2013)

Regularized logistic regression for fast importance sampling based SRAM yield analysis. - Lama Shaer; Rouwaida Kanj; Rajiv V. Joshi; Maria Malik; Ali Chehab (ISQED, 2017)

Data Imbalance Handling Approaches for Accurate Statistical Modeling and Yield Analysis of Memory Designs. - Lama Shaer; Rouwaida Kanj; Rajiv V. Joshi (ISCAS, 2019)

Group LARS-Based Iterative Reweighted Least Squares Methodology for Efficient Statistical Modeling of Memory Designs. - Lama Shaer; Rouwaida Kanj; Rajiv V. Joshi; Ali Chehab (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

A Best Balance Ratio Ordered Feature Selection Methodology for Robust and Fast Statistical Analysis of Memory Designs. - Lama Shaer; Rouwaida Kanj; Rajiv V. Joshi (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)