ATOLL: A High-Performance Communication Device for Massively Parallel Systems. - Ulrich Brüning 001; Lambert Schaelicke (APDC, 1997)

Memory System Support for Irregular Applications. - John B. Carter; Wilson C. Hsieh; Mark R. Swanson; Lixin Zhang 002; Erik Brunvand; Al Davis; Chen-Chi Kuo; Ravindra Kuramkote; Michael A. Parker; Lambert Schaelicke; Leigh Stoller; Terry Tateyama (LCR, 1998)

Improving I/O Performance with a Conditional Store Buffer. - Lambert Schaelicke; Al Davis (MICRO, 1998)

Impulse: Building a Smarter Memory Controller. - John B. Carter; Wilson C. Hsieh; Leigh Stoller; Mark R. Swanson; Lixin Zhang 002; Erik Brunvand; Al Davis; Chen-Chi Kuo; Ravindra Kuramkote; Michael A. Parker; Lambert Schaelicke; Terry Tateyama (HPCA, 1999)

Profiling I/O Interrupts in Modern Architectures. - Lambert Schaelicke; Al Davis; Sally A. McKee (MASCOTS, 2000)

The Impulse Memory Controller. - Lixin Zhang 002; Zhen Fang 002; Michael A. Parker; Binu K. Mathew; Lambert Schaelicke; John B. Carter; Wilson C. Hsieh; Sally A. McKee (IEEE Trans. Computers, 2001)

Architectural Support of User-Level Input/Output. - Lambert Schaelicke (2001)

Profiling Interrupt Handler Performance through Kernel Instrumentation. - Branden J. Moore; Thomas Slabach; Lambert Schaelicke (ICCD, 2003)

Characterizing the Performance of Network Intrusion Detection Sensors. - Lambert Schaelicke; Thomas Slabach; Branden J. Moore; Curt Freeland (RAID, 2003)

Cache implications of aggressively pipelined high performance microprocessors. - Timothy J. Dysart; Branden J. Moore; Lambert Schaelicke; Peter M. Kogge (ISPASS, 2004)

SPANIDS: a scalable network intrusion detection loadbalancer. - Lambert Schaelicke; Kyle B. Wheeler; Curt Freeland (Conf. Computing Frontiers, 2005)

Evaluating the impact of the simulation environment on experimentation results. - Lambert Schaelicke (Perform. Evaluation, 2005)

The design and utility of the ML-RSIM system simulator. - Lambert Schaelicke; Michael A. Parker (J. Syst. Archit., 2006)

Design Trade-Offs for User-Level I/O Architectures. - Lambert Schaelicke; Alan L. Davis (IEEE Trans. Computers, 2006)

A Phase-Adaptive Approach to Increasing Cache Performance. - Matthew A. Watkins; Sally A. McKee; Lambert Schaelicke (PACT, 2007)

Revisiting Cache Block Superloading. - Matthew A. Watkins; Sally A. McKee; Lambert Schaelicke (HiPEAC, 2009)