Lampros Pyrgas

Orcid: 0000-0001-8606-511X

Affiliations:
  • Technological Educational Institute of Western Greece, DICES Lab, Antirrion, Greece


According to our database1, Lampros Pyrgas authored at least 13 papers between 2016 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2021
5G Security: FPGA Implementation of SNOW-V Stream Cipher.
Proceedings of the 24th Euromicro Conference on Digital System Design, 2021

2020
8-bit serialised architecture of SEED block cipher for constrained devices.
IET Circuits Devices Syst., 2020

Are ring oscillators without a combinatorial loop good enough for Hardware Trojan detection?
Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020

2019
An efficient multi-parameter approach for FPGA hardware Trojan detection.
Microprocess. Microsystems, 2019

An 8-bit Compact Architecture of Lesamnta-LW Hash Function for Constrained Devices.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019

A Very Compact Architecture of CLEFIA Block Cipher for Secure IoT Systems.
Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

2018
Compact FPGA architectures for the two-band fast discrete Hartley transform.
Microprocess. Microsystems, 2018

A 4-bit Architecture of SEED Block Cipher for IoT Applications.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

An FPGA Hardware Trojan Detection Approach Based on Multiple Parameter Analysis.
Proceedings of the 21st Euromicro Conference on Digital System Design, 2018

A Hybrid FPGA Trojan Detection Technique Based-on Combinatorial Testing and On-chip Sensing.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2018

2017
Thermal Sensor Based Hardware Trojan Detection in FPGAs.
Proceedings of the Euromicro Conference on Digital System Design, 2017

2016
An Efficient Reconfigurable Ring Oscillator for Hardware Trojan Detection.
Proceedings of the 20th Pan-Hellenic Conference on Informatics, 2016

An FPGA design for the Two-Band Fast Discrete Hartley Transform.
Proceedings of the 2016 IEEE International Symposium on Signal Processing and Information Technology, 2016


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