An Efficient SAT-Based Test Generation Algorithm with GPU Accelerator. - Muhammad Osama 003; Lamya Gaber; Aziza I. Hussein; Hanafy Mahmoud (J. Electron. Test., 2018)

Improved Automatic Correction for Digital VLSI Circuits. - Lamya Gaber; Aziza I. Hussein; Mohammed Moness (ICM, 2019)

Automated Design Error Debugging of Digital VLSI Circuits. - Mohammed Moness; Lamya Gaber; Aziza I. Hussein; Hanafy M. Ali (J. Electron. Test., 2022)

Computation of minimal unsatisfiable subformulas for SAT-based digital circuit error diagnosis. - Lamya Gaber; Aziza I. Hussein; Hanafy Mahmoud; M. Mourad Mabrook; Mohammed Moness (J. Ambient Intell. Humaniz. Comput., 2022)