Parallel calculation of 3-D parasitic resistance and capacitance with linear boundary elements. - Wenming Zhou; Zeyi Wang; Lan Rao (ASP-DAC, 1997)

New Graphical IDDQ Signatures Reduce Defect Level and Yield Loss. - Lan Rao; Michael L. Bushnell; Vishwani D. Agrawal (VLSI Design, 2003)

Graphical IDDQ Signatures Reduce Defect Level and Yield Loss. - Lan Rao; Michael L. Bushnell; Vishwani D. Agrawal (IEEE Trans. Very Large Scale Integr. Syst., 2007)

An Empirical Study of SLDA for Information Retrieval. - Dashun Ma; Lan Rao; Ting Wang 009 (AIRS, 2011)

A bidirectional multi-band 60-GHz wireless-over-fiber transmission system with compacted base station and mobile terminal using a robust mm-Wave LO free technique. - Chenhui Ye; Liang Zhang; Ming Zhu 008; Anlin Yi; Lan Rao; Jianjun Yu; Yikai Su; Sailing He; Gee-Kung Chang (OFC/NFOEC, 2013)