Design Framework for Ferroelectric Gate Stack Engineering of Vertical NAND Structures for Efficient TLC and QLC Operation. - Dipjyoti Das; Lance Fernandes; Prasanna Venkatesan Ravindran; Taeyoung Song; Chinsung Park; Nashrah Afroze; Mengkun Tian; Hang Chen; Winston Chem; Kijoon Kim; Jongho Woo; Suhwan Lim; et al. (IMW, 2024)

Comparative Study of Channel Materials for Ferroelectric NAND Applications. - Lance Fernandes; Prasanna Venkatesan Ravindran; Mengkun Tian; Yu-Hsin Kuo; Nashrah Afroze; Salma Soliman; Sanghyun Kang; Dyutimoy Chakraborty; Taeyoung Song; Chengyang Zhang; Kijoon Kim; Kwangyou Seo; et al. (IMW, 2025)

Enhanced Memory Performance in Ferroelectric NAND Applications: The Role of Tunnel Dielectric Position for Robust 10-Year Retention. - Prasanna Venkatesan Ravindran; Andrea Padovani; Lance Fernandes; Priyankka Gundlapudi Ravikumar; Chinsung Park; Huy Tran; Zekai Wang; Hari Jayasankar; Amrit Garlapati; Taeyoung Song; Hang Chen; Winston Chern; et al. (IRPS, 2025)

Modeling Dynamic Interplay Between Charge Traps and Polarization for Memory Window Enhancement in Gate Injection Layers. - Minji Shon; Chinsung Park; Prasanna Venkatesan Ravindran; Lance Fernandes; Kijoon Kim; Jongho Woo; Suhwan Lim; Kwangsoo Kim; Wanki Kim; Daewon Ha; Suman Datta; Asif Khan; et al. (IRPS, 2025)