Hardware efficient lossless image compression engine. - Lane Brooks; Keith Fife (ICASSP (5), 2004)

A 3MPixel Low-Noise Flexible Architecture CMOS Image Sensor. - Jungwook Yang; Keith Fife; Lane Brooks; Charles G. Sodini; Andrew Betts; Pavan Mudunuru; Hae-Seung Lee (ISSCC, 2006)

A Zero-Crossing-Based 8b 200MS/s Pipelined ADC. - Lane Brooks; Hae-Seung Lee (ISSCC, 2007)

A Zero-Crossing-Based 8-bit 200 MS/s Pipelined ADC. - Lane Brooks; Hae-Seung Lee (IEEE J. Solid State Circuits, 2007)

Background Calibration of Pipelined ADCs Via Decision Boundary Gap Estimation. - Lane Brooks; Hae-Seung Lee (IEEE Trans. Circuits Syst. I Regul. Pap., 2008)

Circuits and algorithms for pipelined ADCs in scaled CMOS technologies. - Lane Brooks (2008)

A 12b 50MS/s fully differential zero-crossing-based ADC without CMFB. - Lane Brooks; Hae-Seung Lee (ISSCC, 2009)

A 12b, 50 MS/s, Fully Differential Zero-Crossing Based Pipelined ADC. - Lane Brooks; Hae-Seung Lee (IEEE J. Solid State Circuits, 2009)

Zero-Crossing-Based Ultra-Low-Power A/D Converters. - Hae-Seung Lee; Lane Brooks; Charles G. Sodini (Proc. IEEE, 2010)