12-b 125 MSPS CMOS D/A designed for spectral performance. - Douglas Mercer; Larry Singer (ISLPED, 1996)

A 55-mW, 10-bit, 10 Msample/s Nyquist rate CMOS ADC. - Iuri Mehr; Larry Singer (CICC, 1999)

A 55-mW, 10-bit, 40-Msample/s Nyquist-rate CMOS ADC. - Iuri Mehr; Larry Singer (IEEE J. Solid State Circuits, 2000)

A 3-V 340-mW 14-b 75-Msample/s CMOS ADC with 85-dB SFDR at Nyquist input. - Wenhua William Yang; Dan Kelly; Iuri Mehr; Mark T. Sayuk; Larry Singer (IEEE J. Solid State Circuits, 2001)

A 10-300-MHz IF-digitizing IC with 90-105-dB dynamic range and 15-333-kHz bandwidth. - Richard Schreier; Jennifer Lloyd; Larry Singer; Donald Paterson; Mike Timko; Michael Hensley; Greg Patterson; Kevin Behel; James Zhou (IEEE J. Solid State Circuits, 2002)

A 16b 125MS/s 385mW 78.7dB SNR CMOS pipeline ADC. - Siddharth Devarajan; Larry Singer; Dan Kelly; Steven Decker; Abhishek Kamath; Paul Wilkins (ISSCC, 2009)

A 4-channel 20-to300 Mpixel/s analog front-end with sampled thermal noise below kT/C for digital SLR cameras. - Ronald Kapusta; Hiroto Shinozaki; Eitake Ibaragi; Kevin Ni; Richard Wang; Mark T. Sayuk; Larry Singer; Katsu Nakamura (ISSCC, 2009)

A 16-bit, 125 MS/s, 385 mW, 78.7 dB SNR CMOS Pipeline ADC. - Siddharth Devarajan; Larry Singer; Dan Kelly; Steven Decker; Abhishek Kamath; Paul Wilkins (IEEE J. Solid State Circuits, 2009)

16.7 A 12b 10GS/s interleaved pipeline ADC in 28nm CMOS technology. - Siddharth Devarajan; Larry Singer; Dan Kelly; Steve Kosic; Tao Pan; José B. Silva; Janet Brunsilius; Daniel Rey-Losada; Frank Murden; Carroll Speir; Jeff Bray; Eric Otte; et al. (ISSCC, 2017)

A 12-b 10-GS/s Interleaved Pipeline ADC in 28-nm CMOS Technology. - Siddharth Devarajan; Larry Singer; Dan Kelly; Tao Pan; José B. Silva; Janet Brunsilius; Daniel Rey-Losada; Frank Murden; Carroll Speir; Jeff Bray; Eric Otte; Nevena Rakuljic; et al. (IEEE J. Solid State Circuits, 2017)