Maximizing the Functional Yield of Wafer-to-Wafer 3-D Integration. - Sherief Reda; Gregory Smith 002; Larry Smith 004 (IEEE Trans. Very Large Scale Integr. Syst., 2009)

Effects of Copper Plasticity on the Induction of Stress in Silicon from Copper Through-Silicon Vias (TSVs) for 3D Integrated Circuits. - Benjamin Backes; Colin McDonough; Larry Smith 004; Wei Wang 003; Robert E. Geer (J. Electron. Test., 2012)