Modeling Crosstalk in Resistive VLSI Interconnections. - Ashok Vittal; Lauren Hui Chen; Malgorzata Marek-Sadowska; Kai-Ping Wang; Sherry Yang 003 (VLSI Design, 1999)

Crosstalk in VLSI interconnections. - Ashok Vittal; Lauren Hui Chen; Malgorzata Marek-Sadowska; Kai-Ping Wang; Sherry Yang 003 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999)

Aggressor alignment for worst-case coupling noise. - Lauren Hui Chen; Malgorzata Marek-Sadowska (ISPD, 2000)

Aggressor alignment for worst-case crosstalk noise. - Lauren Hui Chen; Malgorzata Marek-Sadowska (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001)

Coping with buffer delay change due to power and ground noise. - Lauren Hui Chen; Malgorzata Marek-Sadowska; Forrest Brewer (DAC, 2002)

Closed-Form Crosstalk Noise Metrics for Physical Design Applications. - Lauren Hui Chen; Malgorzata Marek-Sadowska (DATE, 2002)

Sizing Power/Ground Meshes for Clocking and Computing Circuit Components. - Arindam Mukherjee 001; Kai Wang 011; Lauren Hui Chen; Malgorzata Marek-Sadowska (DATE, 2002)

Incremental delay change due to crosstalk noise. - Lauren Hui Chen; Malgorzata Marek-Sadowska (ISPD, 2002)

Efficient Closed-Form Crosstalk Delay Metrics. - Lauren Hui Chen; Malgorzata Marek-Sadowska (ISQED, 2002)

Buffer delay change in the presence of power and ground noise. - Lauren Hui Chen; Malgorzata Marek-Sadowska; Forrest Brewer (IEEE Trans. Very Large Scale Integr. Syst., 2003)