Wafer Testing with Pairwise Comparisons. - Kaiyuan Huang; Vinod K. Agarwal; Laurence E. LaForge (FTCS, 1992)

Feasible Regions Quantify the Configuration Power of Arrays with Multiple Fault Types. - Laurence E. LaForge (EDCC, 1994)

Almost Sure Diagnosis of Almost Every Good Element. - Laurence E. LaForge; Kaiyuan Huang; Vinod K. Agarwal (IEEE Trans. Computers, 1994)

A Diagnosis Algorithm for Constant Degree Structures and Its Application to VLSI Circuit Testing. - Kaiyuan Huang; Vinod K. Agarwal; Laurence E. LaForge; Krishnaiyan Thulasiraman (IEEE Trans. Parallel Distributed Syst., 1995)

Configuration of Locally Spared Arrays in the Presence of Multiple Fault Types. - Laurence E. LaForge (IEEE Trans. Computers, 1999)

What designers of microelectronic systems should know about arrays spared by rows and columns. - Laurence E. LaForge (IEEE Trans. Reliab., 2000)

Linear time computation of robust stability margins. - M. Sami Fadali; Laurence E. LaForge; Assem H. Sonbol (ACC, 2001)

Frequency Response Bound Determination Using a Kharitonov and Algorithmic Framework. - M. Sami Fadali; Laurence E. LaForge; Frederick C. Harris Jr. (CAINE, 2001)

Compensator plane design for engineering models. - M. Sami Fadali; Laurence E. LaForge (ACC, 2003)

What Designers of Bus and Network Architectures Should Know about Hypercubes. - Laurence E. LaForge; Kirk F. Korver; M. Sami Fadali (IEEE Trans. Computers, 2003)