Analyse de défaillances de circuits VLSI par microscopie électronique à balayage. (Failure analysis of VLSI circuits by scanning electron microscopy). - Laurent Bergher (1985)

Industrial experimentation of high-level synthesis. - Polen Kission; Etienne Closse; Laurent Bergher; Ahmed Amine Jerraya (EURO-DAC, 1993)

Am Embedded System Case Study: The Firm Ware Development Environment for a Multimedia Audio Processor. - Clifford Liem; Marco Cornero; Miguel Santana; Pierre G. Paulin; Ahmed Amine Jerraya; Jean-Marc Gentit; Jean Lopez; Xavier Figari; Laurent Bergher (DAC, 1997)

FALPEM: Framework for Architectural-Level Power Estimation and Optimization for Large Memory Sub-Systems. - Amit Chhabra; Harsh Rawat; Mohit Jain; Pascal Tessier; Daniel Pierredon; Laurent Bergher; Promod Kumar (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015)