A parallel architecture for the ICA algorithm: DSP plane of a 3-D heterogeneous sensor. - Vijay K. Jain; Sanjukta Bhanja; Glenn H. Chapman; Lavanya Doddannagari; Nguyen Nguyen (ICASSP (5), 2005)

A highly reconfigurable computing array: DSP plane of a 3D heterogeneous SoC. - Vijay K. Jain; Sanjukta Bhanja; Glenn H. Chapman; Lavanya Doddannagari (SoCC, 2005)