A Reconfigurable Multiprocessor. - Lee D. Coraor; Paul T. Hulina (ICPP, 1985)

A Hardware Memory Mapping Unit for Efficient Address Computation. - Paul T. Hulina; Lee D. Coraor (ICPP, 1987)

A General Model for Memory-Based Finite-State Machines. - Lee D. Coraor; Paul T. Hulina; Orlando A. Morean (IEEE Trans. Computers, 1987)

Coprocessor architectures for efficient address computation and memory accessing. - Paul T. Hulina; Lee D. Coraor (Comput. Syst. Sci. Eng., 1990)

Performance Analysis of an Address Generation Coprocessor. - Paul T. Hulina; Lee D. Coraor; Shih-Wei Sun (ICPP (1), 1991)

Classification and Performance Evaluation of Instruction Buffering Techniques. - Lizyamma Kurian; Paul T. Hulina; Lee D. Coraor; Dhamir N. Mannai (ISCA, 1991)

Memory Latency Effects in Decoupled Architectures With a Single Data Memory Module. - Lizyamma Kurian; Paul T. Hulina; Lee D. Coraor (ISCA, 1992)

Design and VLSI implementation of an access processor for a decoupled architecture. - Paul T. Hulina; Lizyamma Kurian; Eugene B. John; Lee D. Coraor (Microprocess. Microsystems, 1992)

Structured Data Access Mechanisms for a Decoupled Computer Architecture. - Ali Berrached; Paul T. Hulina; Lee D. Coraor (ICPP (2), 1994)

Module Partitioning and Interlaced Data Placement Schemes to Reduce Conflicts in Interleaved Memories. - Lizyamma Kurian; Bermjae Choi; Paul T. Hulina; Lee D. Coraor (ICPP (1), 1994)

Memory Latency Effects in Decoupled Architectures. - Lizyamma Kurian; Paul T. Hulina; Lee D. Coraor (IEEE Trans. Computers, 1994)

A comparative evaluation of software techniques to hide memory latency. - Lizy Kurian John; Vinod Reddy; Paul T. Hulina; Lee D. Coraor (HICSS (1), 1995)

Program Balance and Its Impact on High Performance RISC Architectures. - Lizy Kurian John; Vinod Reddy; Paul T. Hulina; Lee D. Coraor (HPCA, 1995)

Improving Cache Performance in a Multiprocessor Environment. - Jong S. Park; Lee D. Coraor (PDPTA, 1995)

Implementing Parallelism in Random Discrete Event-Driven Simulation. - Marc Bumble; Lee D. Coraor (IPPS/SPDP Workshops, 1998)

Architecture for a Non-deterministic Simulation Machine. - Marc Bumble; Lee D. Coraor (WSC, 1998)

Evaluation of Computing in Memory Architectures for Digital Image Processing Applications. - David L. Landis; Paul T. Hulina; Scott Deno; Luke Roth; Lee D. Coraor (ICCD, 1999)

Computing in Memory Architectures for Digital Image Processing. - Luke Roth; Lee D. Coraor; David L. Landis; Paul T. Hulina; Scott Deno (MTDT, 1999)

Language-Based Rapid Prototyping Methods for Legacy System Re-Engineering and Re-Use. - David L. Landis; Praveen Guddeti; Paul T. Hulina; Lee D. Coraor (IEEE International Workshop on Rapid System Prototyping, 1999)

A global synchronization network for a non-deterministic simulation architecture. - Marc Bumble; Lee D. Coraor (WSC, 1999)

Exploring CORSIM Runtime Characteristics: Profiling a Traffic Simulator. - Marc Bumble; Lee D. Coraor; Lily Elefteriadou (Annual Simulation Symposium, 2000)

Detection of Obstacles in the Flight Path of an Aircraft. - Tarak Gandhi; Mau-Tsuen Yang; Rangachar Kasturi; Octavia I. Camps; Lee D. Coraor; Jeffrey McCandless (CVPR, 2000)

Real-Time Implementation of Obstacle Detection Algorithms on a Datacube MaxPCI Architecture. - Mau-Tsuen Yang; Tarak Gandhi; Rangachar Kasturi; Lee D. Coraor; Octavia I. Camps; Jeffrey McCandless (Real Time Imaging, 2002)

An architecture for a nondeterministic distributed simulator. - Marc Bumble; Lee D. Coraor (IEEE Trans. Veh. Technol., 2002)

Performance characterization of the dynamic programming obstacle detection algorithm. - Tarak Gandhi; Mau-Tsuen Yang; Rangachar Kasturi; Octavia I. Camps; Lee D. Coraor; Jeffrey McCandless (IEEE Trans. Image Process., 2006)