Stretching the Limits of Clock-Gating Efficiency in Server-Class Processors. - Hans M. Jacobson; Pradip Bose; Zhigang Hu; Alper Buyuktosunoglu; Victor V. Zyuban; Richard J. Eickemeyer; Lee Eisen; John Griswell; Doug Logan; Balaram Sinharoy; Joel M. Tendler (HPCA, 2005)

IBM POWER6 accelerators: VMX and DFU. - Lee Eisen; John Wesley Ward III; Hans-Werner Tast; Nicolas Mäding; Jens Leenstra; Silvia M. Müller; Christian Jacobi 002; Jochen Preiss; Eric M. Schwarz; Steven R. Carlough (IBM J. Res. Dev., 2007)

A 5.2GHz microprocessor chip for the IBM zEnterprise™ system. - James D. Warnock; Y. Chan; William V. Huott; Sean M. Carey; Michael F. Fee; Huajun Wen; Mary Jo Saccamango; Frank Malgioglio; Patrick J. Meaney; Donald W. Plass; Yuen H. Chan; Mark D. Mayo; et al. (ISSCC, 2011)

The zEnterprise 196 System and Microprocessor. - Brian W. Curran; Lee Eisen; Eric M. Schwarz; Pak-kin Mak; James D. Warnock; Patrick J. Meaney; Michael F. Fee (IEEE Micro, 2011)