10.3 heterogeneous multi-processing quad-core CPU and dual-GPU design for optimal performance, power, and thermal tradeoffs in a 28nm mobile application processor. - Alice Wang; Tsung-Yao Lin; Shichin Ouyang; Wei-Hung Huang; Jidong Wang; Shu-Hsin Chang; Sheng-Ping Chen; Chun-Hsiung Hu; J. C. Tai; Koan-Sin Tan; Meng-Nan Tsou; Ming-Hsien Lee; et al. (ISSCC, 2014)

4.3 A 20nm 2.5GHz ultra-low-power tri-cluster CPU subsystem with adaptive power allocation for optimal mobile SoC performance. - Hugh Mair; Gordon Gammie; Alice Wang; Rolf Lagerquist; C. J. Chung; Sumanth Gururajarao; Ping Kao; Anand Rajagopalan; Anirban Saha; Amit Jain; Ericbill Wang; Shichin Ouyang; et al. (ISSCC, 2016)

2.5 A 7nm FinFET 2.5GHz/2.0GHz Dual-Gear Octa-Core CPU Subsystem with Power/Performance Enhancements for a Fully Integrated 5G Smartphone SoC. - Hugh Mair; Ericbill Wang; Ashish Nayak; Rolf Lagerquist; Loda Chou; Gordon Gammie; HsinChen Chen; Lee-Kee Yong; Manzur Rahman; Jenny Wiedemeier; Ramu Madhavaram; Alex Chiou; et al. (ISSCC, 2020)

A 7nm 5G Mobile SoC Featuring a 3.0GHz Tri-Gear Application Processor Subsystem. - HsinChen Chen; Rolf Lagerquist; Ashish Nayak; Hugh Mair; Gokulakrishnan Manoharan; Ericbill Wang; Gordon Gammie; Efron Ho; Anand Rajagopalan; Lee-Kee Yong; Ramu Madhavaram; Madhur Jagota; et al. (ISSCC, 2021)