Window Memory Layout Scheme for Alternate Row-Wise/Column-Wise Matrix Access. - Lei Guo 029; Yuhua Tang; Yong Dou; Yuanwu Lei; Meng Ma; Jie Zhou 007 (IEICE Trans. Inf. Syst., 2013)

VLIW coprocessor for IEEE-754 quadruple-precision elementary functions. - Yuanwu Lei; Yong Dou; Lei Guo 029; Jinbo Xu; Jie Zhou 007; Yazhuo Dong; Hongjian Li (ACM Trans. Archit. Code Optim., 2013)

A Study on Layer Connection Strategies in Stacked Convolutional Deep Belief Networks. - Lei Guo 029; Shijie Li; Xin Niu 002; Yong Dou (CCPR (1), 2014)

Transpose-free variable-size FFT accelerator based on-chip SRAM. - Lei Guo 029; Yuhua Tang; Yuanwu Lei; Yong Dou; Jie Zhou 007 (IEICE Electron. Express, 2014)

FPGA Implementation of a Special-Purpose VLIW Structure for Double-Precision Elementary Function. - Yuanwu Lei; Lei Guo 029; Yong Dou; Sheng Ma; Jinbo Xu (ACM Trans. Reconfigurable Technol. Syst., 2014)