50-Gb/s SiGe BiCMOS 4: 1 multiplexer and 1: 4 demultiplexer for serial communication systems. - Mounir Meghelli; Alexander V. Rylyakov; Lei Shan (IEEE J. Solid State Circuits, 2002)

SiGe BiCMOS integrated circuits for high-speed serial communication links. - Daniel J. Friedman; Mounir Meghelli; Benjamin D. Parker; Jungwook Yang; Herschel A. Ainspan; Alexander V. Rylyakov; Young Hoon Kwark; Mark B. Ritter; Lei Shan; Steven J. Zier; Michael Sorna; Mehmet Soyuer (IBM J. Res. Dev., 2003)

A 10-Gb/s 5-Tap DFE/4-Tap FFE Transceiver in 90-nm CMOS Technology. - John F. Bulzacchelli; Mounir Meghelli; Sergey V. Rylov; Woogeun Rhee; Alexander V. Rylyakov; Herschel A. Ainspan; Benjamin D. Parker; Michael P. Beakes; Aichin Chung; Troy J. Beukema; Petar K. Pepeljugoski; Lei Shan; et al. (IEEE J. Solid State Circuits, 2006)

A 1.4-pJ/b, power-scalable 16×12-Gb/s source-synchronous I/O with DFE receiver in 32nm SOI CMOS technology. - Timothy O. Dickson; Yong Liu 023; Sergey V. Rylov; Ankur Agrawal; Seongwon Kim; Ping-Hsuan Hsieh; John F. Bulzacchelli; Mark A. Ferriss; Herschel A. Ainspan; Alexander V. Rylyakov; Benjamin D. Parker; Christian W. Baks; et al. (CICC, 2014)

GI/Geom/1 queue based on communication model for mesh networks. - Wei Wei; Quan Xu; L. Wang; X. H. Hei; P. Shen; W. Shi; Lei Shan (Int. J. Commun. Syst., 2014)

A 1.4 pJ/bit, Power-Scalable 16×12 Gb/s Source-Synchronous I/O With DFE Receiver in 32 nm SOI CMOS Technology. - Timothy O. Dickson; Yong Liu 023; Sergey V. Rylov; Ankur Agrawal; Seongwon Kim; Ping-Hsuan Hsieh; John F. Bulzacchelli; Mark A. Ferriss; Herschel A. Ainspan; Alexander V. Rylyakov; Benjamin D. Parker; Michael P. Beakes; et al. (IEEE J. Solid State Circuits, 2015)

Accelerating Nyström Kernel Independent Component Analysis with Many Integrated Core Architecture. - Lei Shan; He Wang; Weixia Xu; Canqun Yang; Minxuan Zhang (NCCET, 2016)

A Dynamic Multi-precision Fixed-Point Data Quantization Strategy for Convolutional Neural Network. - Lei Shan; Minxuan Zhang; Lin Deng; Guohui Gong (NCCET, 2016)

Heterogeneous acceleration for CNN training with many integrated core. - Lei Shan; Canqun Yang; Weixia Xu; Minxuan Zhang (ICSPCC, 2017)

Delay Compensated Asynchronous Adam Algorithm for Deep Neural Networks. - Naiyang Guan; Lei Shan; Canqun Yang; Weixia Xu; Minxuan Zhang (ISPA/IUCC, 2017)

Impulse Feature Extraction of Bearing Faults Based on Convolutive Nonnegative Matrix Factorization. - Lin Liang; Lei Shan; Fei Liu; Maolin Li; Ben Niu; Guanghua Xu (IEEE Access, 2020)

A Triboelectric Energy Harvesting IC With High-Voltage Synchronous Electric Charge Extraction Strategy and Superior Systematic Efficiency. - Dongping Zhen; Zerui Xu; Jiajie Yan; Yuan Tu; Changming Ding; Chi Zhang; She Chen; Lei Shan; Xiaohong Wang; Sixing Xu (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)