Polynomial Formal Verification of a Processor: A RISC-V Case Study. - Lennart Weingarten; Alireza Mahzoon; Mehran Goli; Rolf Drechsler (ISQED, 2023)

PolyMiR: Polynomial Formal Verification of the MicroRV32 Processor. - Lennart Weingarten; Kamalika Datta; Rolf Drechsler (NANOARCH, 2023)

Complete and Efficient Verification for a RISC-V Processor Using Formal Verification. - Lennart Weingarten; Kamalika Datta; Abhoy Kole; Rolf Drechsler (DATE, 2024)

Towards Polynomial Formal Verification of Neuromorphic Architectures. - Lennart Weingarten; Kamalika Datta; Rolf Drechsler (ISED, 2024)

Late Breaking Results: Towards Efficient Formal Verification of Dot Product Architectures. - Lennart Weingarten; Kamalika Datta; Rolf Drechsler (DATE, 2025)

Multi-Input MAGIC Synthesis and Verification for In-Memory Computing Design. - Saeideh Nabipour; Kamalika Datta; Lennart Weingarten; Abhoy Kole; Rolf Drechsler (ISMVL, 2025)

qSAT: Design of an Efficient Quantum Satisfiability Solver for Hardware Equivalence Checking. - Abhoy Kole; Mohammed E. Djeridane; Lennart Weingarten; Kamalika Datta; Rolf Drechsler (ACM J. Emerg. Technol. Comput. Syst., 2025)