High Performance Low Swing Clock Tree Synthesis with Custom D Flip-Flop Design. - Can Sitik; Leo Filippini; Emre Salman; Baris Taskin (ISVLSI, 2014)

A wirelessly powered system with charge recovery logic. - Leo Filippini; Emre Salman; Baris Taskin (ICCD, 2015)

FinFET-Based Low-Swing Clocking. - Can Sitik; Emre Salman; Leo Filippini; Sung-Jun Yoon; Baris Taskin (ACM J. Emerg. Technol. Comput. Syst., 2015)

Charge recovery logic for thermal harvesting applications. - Leo Filippini; Baris Taskin (ISCAS, 2016)

Stability of Rotary Traveling Wave Oscillators under process variations and NBTI. - Ragh Kuttappa; Leo Filippini; Scott Lerner; Baris Taskin (ISCAS, 2017)

Wireless charge recovery system for implanted electroencephalography applications in mice. - Leo Filippini; Diane Lim; Lunal Khuon; Baris Taskin (ISQED, 2017)

Charge recovery implementation of an analog comparator: Initial results. - Leo Filippini; Lunal Khuon; Baris Taskin (MWSCAS, 2017)

A charge recovery logic system bus. - Leo Filippini; Baris Taskin (SLIP, 2017)

A 900 MHz Charge Recovery Comparator With 40 fJ per Conversion. - Leo Filippini; Baris Taskin (ISCAS, 2018)

Low Swing - Low Frequency Rotary Traveling Wave Oscillators. - Ragh Kuttappa; Scott Lerner; Leo Filippini; Baris Taskin (ISCAS, 2019)

The Adiabatically Driven StrongARM Comparator. - Leo Filippini; Baris Taskin (IEEE Trans. Circuits Syst. II Express Briefs, 2019)

Comprehensive Low Power Adiabatic Circuit Design with Resonant Power Clocking. - Ragh Kuttappa; Steven Khoa; Leo Filippini; Vasil Pano; Baris Taskin (ISCAS, 2020)

Scalable Resonant Power Clock Generation for Adiabatic Logic Design. - Ragh Kuttappa; Leo Filippini; Nicholas Sica; Baris Taskin (ISVLSI, 2021)

Design Automation for Charge Recovery Logic. - Yilmaz Ege Gonul; Leo Filippini; Junghoon Oh; Ragh Kuttappa; Scott Lerner; Mineo Kaneko; Baris Taskin (ISCAS, 2024)