A failure analysis framework of ReRAM In-Memory Logic operations. - Leon Brackmann; Atousa Jafari; Christopher Bengel; Mahta Mayahinia; Rainer Waser; Dirk J. Wouters; Stephan Menzel; Mehdi B. Tahoori (ITC-Asia, 2022)

Eliminating Capacitive Sneak Paths in Associative Capacitive Networks based on Complementary Resistive Switches for In-Memory Computing. - Tobias Ziegler 005; Leon Brackmann; Tyler Hennen; Christopher Bengel; Stephan Menzel; Dirk J. Wouters (IMW, 2023)

Design Limitations in Oxide-Based Memristive Ternary Content Addressable Memories. - Leon Brackmann; Tobias Ziegler 005; Atousa Jafari; Dirk J. Wouters; Mehdi B. Tahoori; Stephan Menzel (ISCAS, 2023)

Synaptogen: A cross-domain generative device model for large-scale neuromorphic circuit design. - Tyler Hennen; Leon Brackmann; Tobias Ziegler 005; Sebastian Siegel; Stephan Menzel; Rainer Waser; Dirk J. Wouters; Daniel Bedau (CoRR, 2024)

Improved Arithmetic Performance by Combining Stateful and Non-Stateful Logic in Resistive Random Access Memory 1T-1R Crossbars. - Leon Brackmann; Tobias Ziegler 005; Atousa Jafari; Dirk J. Wouters; Mehdi B. Tahoori; Stephan Menzel (Adv. Intell. Syst., 2024)

Running Conventional Automatic Speech Recognition on Memristor Hardware: A Simulated Approach. - Nick Rossenbach; Benedikt Hilmes; Leon Brackmann; Moritz Gunz; Ralf Schlüter (CoRR, 2025)

Experimental Verification and Evaluation of Non-Stateful Logic Gates in Resistive RAM. - Leon Brackmann; Tobias Ziegler 005; Dirk J. Wouters; Stephan Menzel (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)