Introducing SW-Based Fault Handling Mechanisms to Cope with EMI in Embedded Electronics: Are They A Good Remedy? - Fabian Vargas 001; Diogo B. Brum; Dárcio Prestes; Letícia Maria Veiras Bolzani; Eduardo Luis Rhod; Matteo Sonza Reorda (IOLTS, 2003)

Hybrid Soft Error Detection by Means of Infrastructure IP Cores. - Letícia Maria Veiras Bolzani; Maurizio Rebaudengo; Matteo Sonza Reorda; Fabian Vargas 001; Massimo Violante (IOLTS, 2004)

An Integrated Approach for Increasing the Soft-Error Detection Capabilities in SoCs processors. - Paolo Bernardi; Letícia Maria Veiras Bolzani; Maurizio Rebaudengo; Matteo Sonza Reorda; Massimo Violante (DFT, 2005)

On-Line Detection of Control-Flow Errors in SoCs by Means of an Infrastructure IP Core. - Paolo Bernardi; Letícia Maria Veiras Bolzani; Maurizio Rebaudengo; Matteo Sonza Reorda; Fabian Vargas 001; Massimo Violante (DSN, 2005)

Software-Based On-Line Test of Communication Peripherals in Processor-Based Systems for Automotive Applications. - Paolo Bernardi; Letícia Maria Veiras Bolzani; Alberto Manzone; Massimo Osella; Massimo Violante; Matteo Sonza Reorda (MTV, 2006)

A New Hybrid Fault Detection Technique for Systems-on-a-Chip. - Paolo Bernardi; Letícia Maria Veiras Bolzani; Maurizio Rebaudengo; Matteo Sonza Reorda; Fabian Vargas 001; Massimo Violante (IEEE Trans. Computers, 2006)

Co-evolution of test programs and stimuli vectors for testing of embedded peripheral cores. - Letícia Maria Veiras Bolzani; Ernesto Sánchez 001; Massimiliano Schillaci; Giovanni Squillero (IEEE Congress on Evolutionary Computation, 2007)

Extended Fault Detection Techniques for Systems-on-Chip. - Paolo Bernardi; Letícia Maria Veiras Bolzani; Matteo Sonza Reorda (DDECS, 2007)

Coupling EA and high-level metrics for the automatic generation of test blocks for peripheral cores. - Letícia Maria Veiras Bolzani; Ernesto Sánchez 001; Massimiliano Schillaci; Giovanni Squillero (GECCO, 2007)

A Hybrid Approach to Fault Detection and Correction in SoCs. - Paolo Bernardi; Letícia Maria Veiras Bolzani; Matteo Sonza Reorda (IOLTS, 2007)

An Automated Methodology for Cogeneration of Test Blocks for Peripheral Cores. - Letícia Maria Veiras Bolzani; Ernesto Sánchez 001; Massimiliano Schillaci; Matteo Sonza Reorda; Giovanni Squillero (IOLTS, 2007)

An optimized hybrid approach to provide fault detection and correction in SoCs. - Letícia Maria Veiras Bolzani; Paolo Bernardi; Matteo Sonza Reorda (SBCCI, 2007)

A software-based methodology for the generation of peripheral test sets based on high-level descriptions. - Letícia Maria Veiras Bolzani; Edgar E. Sánchez; Matteo Sonza Reorda (SBCCI, 2007)

Integrating Clock Gating and Power Gating for Combined Dynamic and Leakage Power Optimization in Digital CMOS Circuits. - Enrico Macii; Letícia Maria Veiras Bolzani; Andrea Calimera; Alberto Macii; Massimo Poncino (DSD, 2008)

Enabling concurrent clock and power gating in an industrial design flow. - Letícia Maria Veiras Bolzani; Andrea Calimera; Alberto Macii; Enrico Macii; Massimo Poncino (DATE, 2009)

A Hardware-Scheduler for Fault Detection in RTOS-Based Embedded Systems. - Jimmy Tarrillo; Letícia Maria Veiras Bolzani Poehls; Fabian Vargas 001 (DSD, 2009)

Placement-aware Clustering for Integrated Clock and Power Gating. - Letícia Maria Veiras Bolzani; Andrea Calimera; Alberto Macii; Enrico Macii; Massimo Poncino (ISCAS, 2009)

Evaluating a Transmission Power Self-Optimization Technique for WSN in EMI Environments. - Felipe Lavratti; Alex R. Pinto; Letícia Maria Veiras Bolzani; Fabian Vargas 001; Carlos Barros Montez; Fernando Hernandez; Edmundo Gatti; C. Silva (DSD, 2010)

Investigating the Use of BICS to detect resistive-open defects in SRAMs. - Raul Chipana; Letícia Maria Veiras Bolzani; Fabian Vargas 001; Jorge Semião; Juan J. Rodríguez-Andina; Isabel C. Teixeira; João Paulo Teixeira 001 (IOLTS, 2010)

BICS-based March test for resistive-open defect detection in SRAMs. - Raul Chipana; Letícia Maria Veiras Bolzani; Fabian Vargas 001 (LATW, 2010)

Towards a transmission power self-optimization in reliable Wireless Sensor Networks. - Felipe Lavratti; Alex R. Pinto; Dárcio Prestes; Letícia Maria Veiras Bolzani; Fabian Vargas 001; Carlos Montez (LATW, 2010)

A Hybrid Approach for Detection and Correction of Transient Faults in SoCs. - Paolo Bernardi; Letícia Maria Veiras Bolzani Poehls; Michelangelo Grosso; Matteo Sonza Reorda (IEEE Trans. Dependable Secur. Comput., 2010)

A Hardware-Based Approach for Fault Detection in RTOS-Based Embedded Systems. - Dhiego Silva; Kleber Stangherlin; Letícia Maria Veiras Bolzani; Fabian Vargas 001 (ETS, 2011)

An intellectual property core to detect task schedulling-related faults in RTOS-based embedded systems. - Dhiego Silva; Letícia Maria Veiras Bolzani; Fabian Vargas 001 (IOLTS, 2011)

Configurable platform for IC combined tests of total-ionizing dose radiation and electromagnetic immunity. - Juliano Benfica; Letícia Maria Bolzani Poehls; Fabian Vargas 001; José Lipovetzky; Ariel Lutenberg; Sebastián E. García; Edmundo Gatti; Fernando Hernandez; Ney Laert Vilar Calazans (LATW, 2011)

A new Built-In Current Sensor scheme to detect dynamic faults in Nano-Scale SRAMs. - Felipe Lavratti; Andrea Calimera; Letícia Maria Veiras Bolzani; Fabian Vargas 001; Enrico Macii (LATW, 2011)

Using an FPGA-based fault injection technique to evaluate software robustness under SEEs: A case study. - Marta Portela-García; Almudena Lindoso; Luis Entrena; Mario García-Valderas; Celia López-Ongil; Bernardo Pianta; Letícia Maria Bolzani Poehls; Fabian Vargas 001 (LATW, 2011)

12th "IEEE Latin-American Test Workshop" Porto de Galinhas, Brazil, 27-30 March 2011. - Víctor H. Champac; Fernanda Gusmão de Lima Kastensmidt; Letícia Maria Veiras Bolzani Poehls; Fabian Vargas 001; Yervant Zorian (J. Low Power Electron., 2011)

On-chip aging sensor to monitor NBTI effect in nano-scale SRAM. - Arthur Ceratti; Thiago Copetti; Letícia Maria Bolzani Poehls; Fabian Vargas 001 (DDECS, 2012)

Investigating the use of an on-chip sensor to monitor NBTI effect in SRAM. - Arthur Ceratti; Thiago Copetti; Letícia Maria Veiras Bolzani; Fabian Vargas 001 (LATW, 2012)

A Test Platform for Dependability Analysis of SoCs Exposed to EMI and Radiation. - Juliano Benfica; Letícia Maria Bolzani Poehls; Fabian Vargas 001; José Lipovetzky; Ariel Lutenberg; Edmundo Gatti; Fernando Hernandez (J. Electron. Test., 2012)

Evaluating the Effectiveness of a Software-Based Technique Under SEEs Using FPGA-Based Fault Injection Approach. - Marta Portela-García; Almudena Lindoso; Luis Entrena; Mario García-Valderas; Celia López-Ongil; N. Marroni; Bernardo Pianta; Letícia Maria Bolzani Poehls; Fabian Vargas 001 (J. Electron. Test., 2012)

Identifying NBTI-Critical Paths in Nanoscale Logic. - Raimund Ubar; Fabian Vargas 001; Maksim Jenihhin; Jaan Raik; Sergei Kostin; Letícia Maria Bolzani Poehls (DSD, 2013)

Reliability analysis of an on-chip watchdog for embedded systems exposed to radiation and EMI. - C. Oliveira; Juliano Benfica; Letícia Maria Bolzani Poehls; Fabian Vargas 001; José Lipovetzky; Ariel Lutenberg; Edmundo Gatti; Fernando Hernandez; Alexandre Boyer (EMC Compo, 2013)

Phoenix NoC: A distributed fault tolerant architecture. - César A. M. Marcon; Alexandre M. Amory; Thais Webber; Thomas Volpato; Leticia B. Poehls (ICCD, 2013)

Integrating embedded test infrastructure in SRAM cores to detect aging. - W. Prates; Letícia Maria Veiras Bolzani; Gurgen Harutyunyan; A. Davtyan; Fabian Vargas 001; Yervant Zorian (IOLTS, 2013)

Technique based on On-Chip Current Sensors and Neighbourhood Comparison Logic to detect resistive-open defects in SRAMs. - Felipe Lavratti; Letícia Maria Veiras Bolzani; Andrea Calimera; Fabian Vargas 001; Enrico Macii (LATW, 2013)

Investigating the behavior of physical defects in pn-junction based reconfigurable graphene devices. - Sandeep Miryala; Andrea Calimera; Enrico Macii; Massimo Poncino; Letícia Maria Veiras Bolzani Poehls (LATW, 2013)

A flexible framework for modeling and simulation of multipurpose wireless networks. - Vinicius Bohrer; Ramon Fernandes; César A. M. Marcon; Thais Webber; Leticia B. Poehls; Ricardo M. Czekster; Fabiano Hessel (RSP, 2013)

Hierarchical identification of NBTI-critical gates in nanoscale logic. - Sergei Kostin; Jaan Raik; Raimund Ubar; Maksim Jenihhin; Fabian Vargas 001; Letícia Maria Bolzani Poehls; Thiago Santos Copetti (LATW, 2014)

Tiny NoC: A 3D Mesh Topology with Router Channel Optimization for Area and Latency Minimization. - César A. M. Marcon; Ramon Fernandes; Rodrigo Cataldo; Fernando Grando; Thais Webber; Ana Benso; Leticia B. Poehls (VLSID, 2014)

Pre-mapping Algorithm for Heterogeneous MPSoCs. - César A. M. Marcon; Thais Webber; Leticia B. Poehls; Igor K. Pinotti (VLSID, 2014)

An On-Chip Sensor to Monitor NBTI Effects in SRAMs. - Arthur Ceratti; Thiago Copetti; Letícia Maria Bolzani Poehls; Fabian Vargas 001; Rubem Dutra Ribeiro Fagundes (J. Electron. Test., 2014)

Modeling of Physical Defects in PN Junction Based Graphene Devices. - Sandeep Miryala; Matheus Oleiro; Letícia Maria Bolzani Pöhls; Andrea Calimera; Enrico Macii; Massimo Poncino (J. Electron. Test., 2014)

Selected Peer-Reviewed Articles from the 14th IEEE Latin-American Test Workshop, Cordoba, Argentina, April 3-5, 2013. - Letícia Maria Bolzani Poehls; Matteo Sonza Reorda (J. Low Power Electron., 2014)

SPICE-Inspired Fast Gate-Level Computation of NBTI-induced Delays in Nanoscale Logic. - Sergei Kostin; Jaan Raik; Raimund Ubar; Maksim Jenihhin; Thiago Copetti; Fabian Vargas 001; Letícia Maria Bolzani Pöhls (DDECS, 2015)

On-chip Watchdog to monitor RTOS activity in MPSoC exposed to noisy environment. - Christofer de Oliveira; Leticia Bolzani Poehls; Fabian Vargas 001 (EMC Compo, 2015)

Task partitioning optimization algorithm for energy saving and load balance on NoC-based MPSoCs. - Marco P. Stefani; Thais Webber; Ramon Fernandes; Rodrigo Cataldo; Leticia B. Poehls; César A. M. Marcon (ISQED, 2015)

Message from the LATS2015 Chairs. - Víctor H. Champac; Yervant Zorian; Letícia Maria Bolzani Pöhls; Vishwani D. Agrawal (LATS, 2015)

NBTI-aware design of integrated circuits: a hardware-based approach. - Thiago Copetti; G. Cardoso Medeiros; Letícia Maria Bolzani Poehls; Fabian Vargas 001 (LATS, 2015)

Rejuvenation of nanoscale logic at NBTI-critical paths using evolutionary TPG. - N. Palermo; Valentin Tihhomirov; Thiago Santos Copetti; Maksim Jenihhin; Jaan Raik; Sergei Kostin; Marco Gaudesi; Giovanni Squillero; Matteo Sonza Reorda; Fabian Vargas 001; Letícia Maria Bolzani Pöhls (LATS, 2015)

OcNoC: Efficient One-Cycle Router Implementation for 3D Mesh Network-on-Chip. - Ramon Fernandes; Lucas Brahm; Thais Webber; Rodrigo Cataldo; Leticia B. Poehls; César A. M. Marcon (VLSID, 2015)

Evaluating a Hardware-Based Approach for Detecting Resistive-Open Defects in SRAMs. - Felipe Lavratti; Letícia Maria Bolzani Poehls; Fabian Vargas 001; Andrea Calimera; Enrico Macii (VLSID, 2015)

An early prediction methodology for aging sensor insertion to assure safe circuit operation due to NBTI aging. - Andres F. Gomez; Leticia B. Poehls; Fabian Vargas 001; Víctor H. Champac (VTS, 2015)

A dynamic TDMA-based sleep scheduling to minimize WSN energy consumption. - Adelcio Biazi; César A. M. Marcon; Fauzi de M. Shubeita; Leticia B. Poehls; Thais Webber; Fabian Vargas 001 (ICNSC, 2016)

Gate-level modelling of NBTI-induced delays under process variations. - Thiago Copetti; Guilherme Medeiros Machado; Leticia Bolzani Poehls; Fabian Vargas 001; Sergei Kostin; Maksim Jenihhin; Jaan Raik; Raimund Ubar (LATS, 2016)

Analyzing NBTI impact on SRAMs with resistive-open defects. - M. Tulio Martins; G. Cardoso Medeiros; Thiago Copetti; Fabian Vargas 001; Letícia Maria Bolzani Poehls (LATS, 2016)

Analyzing the Impact of SEUs on SRAMs with Resistive-Bridge Defects. - G. Cardoso Medeiros; Letícia Maria Bolzani Pöhls; Fabian Vargas 001 (VLSID, 2016)

NBTI-Aware Design of Integrated Circuits: A Hardware-Based Approach for Increasing Circuits' Life Time. - Thiago Copetti; Guilherme Cardoso Medeiros; Leticia Bolzani Poehls; Fabian Vargas 001 (J. Electron. Test., 2016)

Identification and Rejuvenation of NBTI-Critical Logic Paths in Nanoscale Circuits. - Maksim Jenihhin; Giovanni Squillero; Thiago Santos Copetti; Valentin Tihhomirov; Sergei Kostin; Marco Gaudesi; Fabian Vargas 001; Jaan Raik; Matteo Sonza Reorda; Leticia Bolzani Poehls; Raimund Ubar; Guilherme Cardoso Medeiros (J. Electron. Test., 2016)

Selected Peer Reviewed Articles from the 17th "IEEE Latin-American Test Symposium, " Foz do Iguaçu, Brazil, April 6-8, 2016. - Letícia Maria Bolzani Poehls (J. Low Power Electron., 2016)

Effectiveness of a hardware-based approach to detect resistive-open defects in SRAM cells under process variations. - Andres F. Gomez; Felipe Lavratti; Guilherme Medeiros Machado; M. Sartori; Letícia Maria Veiras Bolzani; Víctor H. Champac; Fabian Vargas 001 (Microelectron. Reliab., 2016)

Analysis of single-event upsets in a Microsemi ProAsic3E FPGA. - Paulo Ricardo Cechelero Villa; Roger C. Goerl; Fabian Vargas 001; Leticia B. Poehls; Nilberto H. Medina; Nemitala Added; Vitor A. P. de Aguiar; Eduardo L. A. Macchione; Fernando Aguirre; Marcilei Aparecida Guazzelli da Silveira; Eduardo Augusto Bezerra (LATS, 2017)

Analyzing the behavior of FinFET SRAMs with resistive defects. - Thiago Santos Copetti; Tiago R. Balen; Guilherme Cardoso Medeiros; Letícia Maria Bolzani Poehls (VLSI-SoC, 2017)

Evaluating the Impact of Resistive Defects on FinFET-Based SRAMs. - Thiago Santos Copetti; Guilherme Cardoso Medeiros; Letícia Maria Bolzani Poehls; Tiago R. Balen (VLSI-SoC (Selected Papers), 2017)

A path energy control technique for energy efficiency on wireless sensor networks. - F. Tubiello; Leticia Bolzani Poehls; Thais Webber; César Augusto Missio Marcon; Fabian Vargas 001 (LASCAS, 2018)

Influence of temperature on dynamic fault behavior due to resistive defects in FinFET-based SRAMs. - G. Cardoso Medeiros; E. Brum; Leticia Bolzani Poehls; Thiago Copetti; Tiago R. Balen (LATS, 2018)

A hardware-based approach for SEU monitoring in SRAMs with weak resistive defects. - George Redivo Pinto; Guilherme Cardoso Medeiros; Fabian Vargas 001; Leticia Bolzani Poehls (LATS, 2018)

An efficient EDAC approach for handling multiple bit upsets in memory array. - Roger C. Goerl; Paulo Ricardo Cechelero Villa; Letícia Maria Veiras Bolzani; Eduardo Augusto Bezerra; Fabian Luis Vargas 001 (Microelectron. Reliab., 2018)

A defect-oriented test approach using on-Chip current sensors for resistive defects in FinFET SRAMs. - G. Cardoso Medeiros; Letícia Maria Veiras Bolzani; Mottaqiallah Taouil; Fabian Vargas 001; Said Hamdioui (Microelectron. Reliab., 2018)

DFT Scheme for Hard-to-Detect Faults in FinFET SRAMs. - Guilherme Cardoso Medeiros; Mottaqiallah Taouil; Moritz Fieback; Leticia Bolzani Poehls; Said Hamdioui (ETS, 2019)

A Comparative Study Between FinFET and CMOS-Based SRAMs under Resistive Defects. - Thiago Santos Copetti; Tiago R. Balen; E. Brum; C. Aquistapace; Leticia Bolzani Poehls (LATS, 2019)

A New Approach to Guarantee Critical Task Schedulability in TDMA-Based Bus Access of Multicore Architecture. - Estevan Lara; Guilherme Debon; Roger C. Goerl; Paulo Ricardo Cechelero Villa; Dorian Schramm; Leticia B. Poehls; Fabian Vargas 001 (LATS, 2019)

Evaluating the Impact of Temperature on Dynamic Fault Behaviour of FinFET-Based SRAMs with Resistive Defects. - G. Cardoso Medeiros; E. Brum; Leticia Bolzani Poehls; Thiago Copetti; Tiago R. Balen (J. Electron. Test., 2019)

Evaluating the Impact of Ionizing Particles on FinFET -based SRAMs with Weak Resistive Defects. - Thiago Copetti; Guilherme Cardoso Medeiros; Mottaqiallah Taouil; Said Hamdioui; Leticia Bolzani Poehls; Tiago R. Balen (LATS, 2020)

Comparing the Impact of Power Supply Voltage on CMOS- and FinFET-Based SRAMs in the Presence of Resistive Defects. - Thiago Copetti; Tiago R. Balen; E. Brum; C. Aquistapace; Leticia Bolzani Poehls (J. Electron. Test., 2020)

Improving the Detection of Undefined State Faults in FinFET SRAMs. - G. Cardoso Medeiros; Moritz Fieback; Thiago Santos Copetti; Anteneh Gebregiorgis; Mottaqiallah Taouil; Leticia B. Poehls; Said Hamdioui (DTIS, 2021)

Detecting Random Read Faults to Reduce Test Escapes in FinFET SRAMs. - G. Cardoso Medeiros; Moritz Fieback; Anteneh Gebregiorgis; Mottaqiallah Taouil; Leticia Bolzani Poehls; Said Hamdioui (ETS, 2021)

Evaluating the Impact of Process Variation on RRAMs. - E. Brum; Moritz Fieback; Thiago Santos Copetti; H. Jiayi; Said Hamdioui; Fabian Vargas 001; Letícia Maria Veiras Bolzani (LATS, 2021)

Validating a DFT Strategy's Detection Capability regarding Emerging Faults in RRAMs. - Thiago Santos Copetti; Tobias Gemmeke; Letícia Maria Veiras Bolzani (VLSI-SoC, 2021)

A DfT Strategy for Detecting Emerging Faults in RRAMs. - Thiago Santos Copetti; Tobias Gemmeke; Letícia Maria Bolzani Pöhls (VLSI-SoC (Selected Papers), 2021)

Review of Manufacturing Process Defects and Their Effects on Memristive Devices. - Letícia Maria Veiras Bolzani; Moritz Fieback; Susanne Hoffmann-Eifert; Thiago Copetti; E. Brum; Stephan Menzel; Said Hamdioui; Tobias Gemmeke (J. Electron. Test., 2021)

Evaluation of Single Event Upset Susceptibility of FinFET-based SRAMs with Weak Resistive Defects. - Thiago Copetti; Guilherme Cardoso Medeiros; Mottaqiallah Taouil; Said Hamdioui; Letícia Maria Bolzani Poehls; Tiago Roberto Balen (J. Electron. Test., 2021)

Hard-to-Detect Fault Analysis in FinFET SRAMs. - Guilherme Cardoso Medeiros; Moritz Fieback; Lizhou Wu; Mottaqiallah Taouil; Letícia Maria Bolzani Poehls; Said Hamdioui (IEEE Trans. Very Large Scale Integr. Syst., 2021)

X-Fault: Impact of Faults on Binary Neural Networks in Memristor-Crossbar Arrays with Logic-in-Memory Computation. - Felix Staudigl; Karl J. X. Sturm; Maximilian Bartel; Thorben Fetz; Dominik Sisejkovic; Jan Moritz Joseph; Letícia Maria Bolzani Pöhls; Rainer Leupers (AICAS, 2022)

NEUROTEC I: Neuro-inspired Artificial Intelligence Technologies for the Electronics of the Future. - Melvin Galicia; Stephan Menzel; Farhad Merchant; Maximilian Müller; Hsin-Yu Chen; Qing-Tai Zhao; Felix Cüppers; Abdur R. Jalil; Qi Shu; Peter Schüffelgen; Gregor Mussler; Carsten Funck; et al. (DATE, 2022)

Hierarchical Memory Diagnosis. - Guilherme Cardoso Medeiros; Moritz Fieback; Anteneh Gebregiorgis; Mottaqiallah Taouil; Letícia Maria Veiras Bolzani; Said Hamdioui (ETS, 2022)

Exploring an On-Chip Sensor to Detect Unique Faults in RRAMs. - Thiago Santos Copetti; M. Nilovic; Moritz Fieback; Tobias Gemmeke; Said Hamdioui; Letícia Maria Bolzani Poehls (LATS, 2022)

Characterization and Test of Intermittent Over RESET in RRAMs. - Hanzhi Xun; Moritz Fieback; Sicong Yuan; Hassen Aziza; Mathijs Heidekamp; Thiago Copetti; Letícia Maria Veiras Bolzani Poehls; Mottaqiallah Taouil; Said Hamdioui (ATS, 2023)

Fault Injection in Native Logic-in-Memory Computation on Neuromorphic Hardware. - Felix Staudigl; Thorben Fetz; Rebecca Pelke; Dominik Sisejkovic; Jan Moritz Joseph; Letícia Maria Bolzani Pöhls; Rainer Leupers (DAC, 2023)

Embedded Tutorial - RRAMs: How to Guarantee Their Quality Test after Manufacturing? - Letícia Maria Veiras Bolzani (DDECS, 2023)

Evaluating a New RRAM Manufacturing Test Strategy. - Thiago Santos Copetti; A. Castelnuovo; Tobias Gemmeke; Letícia Maria Veiras Bolzani (LATS, 2023)

Invited Paper: A Holistic Fault Injection Platform for Neuromorphic Hardware. - Felix Staudigl; Thorben Fetz; Rebecca Pelke; Dominik Sisejkovic; Jan Moritz Joseph; Letícia Maria Veiras Bolzani Poehls; Rainer Leupers (LATS, 2023)

Lifecycle Management of RRAMs: Quality and Reliability. - Letícia Maria Bolzani Pöhls (DTTIS, 2024)

Lifecycle Management of Emerging Memories. - Moritz Fieback; Letícia Maria Veiras Bolzani Poehls (ETS, 2024)

Analyzing the Use of Temperature to Facilitate Fault Propagation in ReRAMs. - Thiago Copetti; A. Chordia; Moritz Fieback; Mottaqiallah Taouil; Said Hamdioui; Letícia Maria Veiras Bolzani (LATS, 2024)

A Fully Automated Platform for Evaluating ReRAM Crossbars. - Rebecca Pelke; Felix Staudigl; Niklas Thomas; Nils Bosbach; Mohammed Hossein; José Cubero-Cascante; Letícia Maria Veiras Bolzani; Rainer Leupers; Jan Moritz Joseph (LATS, 2024)

Understanding Transistor Aging Impact on the Behavior of RRAM Cells. - Seyed Hossein Hashemi Shadmehri; Supriya Chakraborty; Thiago Santos Copetti; Fabian Luis Vargas 001; Letícia Maria Bolzani Poehls (VLSI-SoC, 2024)

A DfT Strategy for Guaranteeing ReRAM's Quality after Manufacturing. - Thiago Santos Copetti; Moritz Fieback; Tobias Gemmeke; Said Hamdioui; Letícia Maria Veiras Bolzani Poehls (J. Electron. Test., 2024)

European Test Symposium Teams: an Anniversary Snapshot. - Maksim Jenihhin; Jaan Raik; Artur Jutman; Natalia Cherezova; Raimund Ubar; Liviu Miclea; Szilárd Enyedi; I. Stefan; Ovidiu Stan; Cosmina Corches; Z. Peng; Petru Eles; et al. (ETS, 2025)

Heterogeneous Integration of Advanced CMOS and Emerging Devices: Challenges and Solutions. - Letícia Maria Bolzani Pöhls; André Lucas Chinazzo; Mahdi Benkhelifa; Anirban Kar; Hussam Amrouch; Milos Krstic (ETS, 2025)

In-Field Monitoring and Preventing Read Disturb Faults in RRAMs. - Hanzhi Xun; Moritz Fieback; Sicong Yuan; Changhao Wang; Erbing Hua; Hassen Aziza; Leticia Bolzani Poehls; Riccardo Cantoro; Rajendra Bishnoi; Mottaqiallah Taouil; Said Hamdioui (ETS, 2025)

ReDiM: An Efficient Strategy for Read Disturb Mitigation in RRAM-Based Accelerators. - Jianan Wen; Andrea Baroni; Alberto Mistroni; Eduardo Pérez; Cristian Zambelli; Christian Wenger; Milos Krstic; Letícia Maria Veiras Bolzani (IOLTS, 2025)

A Combined Strategy for Testing RRAMs After Manufacturing and During Lifetime. - Thiago Santos Copetti; Supriya Chakraborty; Letícia Maria Bolzani Poehls (LATS, 2025)