Fast power network analysis with multiple clock domains. - Wanping Zhang; Ling Zhang; Rui Shi 003; He Peng; Zhi Zhu; Lew Chua-Eoan; Rajeev Murgai; Toshiyuki Shibuya; Noriyuki Ito; Chung-Kuan Cheng (ICCD, 2007)

Finding the Worst Voltage Violation in Multi-Domain Clock Gated Power Network. - Wanping Zhang; Yi Zhu 002; Wenjian Yu; Ling Zhang; Rui Shi 003; He Peng; Zhi Zhu; Lew Chua-Eoan; Rajeev Murgai; Toshiyuki Shibuya; Nuriyoki Ito; Chung-Kuan Cheng (DATE, 2008)

Parallel flow to analyze the impact of the voltage regulator model in nanoscale power distribution network. - Amirali Shayan Arani; Xiang Hu; He Peng; Wenjian Yu; Wanping Zhang; Chung-Kuan Cheng; Mikhail Popovich; Xiaoming Chen; Lew Chua-Eoan; Xiaohua Kong (ISQED, 2009)

Efficient Power Network Analysis Considering Multidomain Clock Gating. - Wanping Zhang; Wenjian Yu; Xiang Hu; Ling Zhang; Rui Shi 003; He Peng; Zhi Zhu; Lew Chua-Eoan; Rajeev Murgai; Toshiyuki Shibuya; Noriyuki Ito; Chung-Kuan Cheng (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009)

Design of "green" high-performance processor circuits. - Tobias Noll; Raney Southerland; Vladimir Stojanovic; Sonia Leon; Lew Chua-Eoan; Alice Wang; Byeong-Gyu Nam; Masaya Sumita (ISSCC, 2011)

Session 10 overview: High-performance digital: High performance digital subcommittee. - Lew Chua-Eoan; Se-Hyun Yang (ISSCC, 2012)

Topics in integrated circuits for communications [Series Editorial]. - Charles Chien; Zhiwei Xu 003; Lew Chua-Eoan (IEEE Commun. Mag., 2013)