Parallel algorithm and complexity results for telephone link simulation. - Vijaya Ramachandran; Li-Chung Wang (SPDP, 1991)

Experience in Massively Parallel Discrete Event Simulation. - Albert G. Greenberg; Boris D. Lubachevsky; Li-C. Wang (SPAA, 1993)

Enhanced testing performance via unbiased test sets. - Li-C. Wang; M. Ray Mercer; Thomas W. Williams (ED&TC, 1995)

On Efficiently and Reliably Achieving Low Defective Part Levels. - Li-C. Wang; M. Ray Mercer; Thomas W. Williams (ITC, 1995)

On the decline of testing efficiency as fault coverage approaches 100%. - Li-C. Wang; M. Ray Mercer; Sophia W. Kao; Thomas W. Williams (VTS, 1995)

A Better ATPG Algorithm and Its Design Principles. - Li-C. Wang; M. Ray Mercer; Thomas W. Williams (ICCD, 1996)

Using Target Faults To Detect Non-Tartget Defects. - Li-C. Wang; M. Ray Mercer; Thomas W. Williams (ITC, 1996)

A New Validation Methodology Combining Test and Formal Verification for PowerPCTM Microprocessor Arrays. - Li-C. Wang; Magdy S. Abadir (ITC, 1997)

Automatic Generation of Assertions for Formal Verification of PowerPC Microprocessor Arrays Using Symbolic Trajectory Evaluation. - Li-C. Wang; Magdy S. Abadir; Nari Krishnamurthy (DAC, 1998)

Measuring the Effectiveness of Various Design Validation Approaches For PowerPC(TM) Microprocessor Arrays. - Li-C. Wang; Magdy S. Abadir; Jing Zeng (DATE, 1998)

Practical Considerations in Formal Equivalence Checking of PowerPC(tm) Microprocessors. - Arun Chandra; Li-C. Wang; Magdy S. Abadir (Great Lakes Symposium on VLSI, 1998)

On Logic and Transistor Level Design Error Detection of Various Validation Approaches for PowerPC(tm) Microprocessor Arrays. - Li-C. Wang; Magdy S. Abadir; Jing Zeng (VTS, 1998)

Test Generation Based on High-Level Assertion Specification for PowerPCTM Microprocessor Embedded Arrays. - Li-C. Wang; Magdy S. Abadir (J. Electron. Test., 1998)

On measuring the effectiveness of various design validation approaches for PowerPC microprocessor embedded arrays. - Li-C. Wang; Magdy S. Abadir; Jing Zeng (ACM Trans. Design Autom. Electr. Syst., 1998)

Modeling the probability of defect excitation for a commercial IC with implications for stuck-at fault-based ATPG strategies. - Jennifer Dworak; Michael R. Grimaila; Sooryong Lee; Li-C. Wang; M. Ray Mercer (ITC, 1999)

Tradeoff analysis for producing high quality tests for custom circuits in PowerPC microprocessors. - Li-C. Wang; Magdy S. Abadir (ITC, 1999)

REDO - Probabilistic Excitation and Deterministic Observation - First Commercial Experimen. - Michael R. Grimaila; Sooryong Lee; Jennifer Dworak; Kenneth M. Butler; Bret Stewart; Hari Balachandran; Bryan Houchins; Vineet Mathur; Jaehong Park; Li-C. Wang; M. Ray Mercer (VTS, 1999)

Experience in Validation of PowerPCTM Microprocessor Embedded Arrays. - Li-C. Wang; Magdy S. Abadir (J. Electron. Test., 1999)

Collaboration between Industry and Academia in Test Research. - Kwang-Ting Cheng; Vishwani D. Agrawal; Jing-Yang Jou; Li-C. Wang; Chi-Feng Wu; Shianling Wu (Asian Test Symposium, 2000)

On the superiority of DO-RE-ME/MPG-D over stuck-at-based defective part level prediction. - Jennifer Dworak; Michael R. Grimaila; Brad Cobb; Ting-Chi Wang; Li-C. Wang; M. Ray Mercer (Asian Test Symposium, 2000)

Enhanced DO-RE-ME based defect level prediction using defect site aggregation-MPG-D. - Jennifer Dworak; Michael R. Grimaila; Sooryong Lee; Li-C. Wang; M. Ray Mercer (ITC, 2000)

On Efficiently Producing Quality Tests for Custom Circuits in PowerPCTM Microprocessors. - Li-C. Wang; Magdy S. Abadir (J. Electron. Test., 2000)

Module placement with boundary constraints using the sequence-pair representation. - Jianbang Lai; Ming-Shiun Lin; Ting-Chi Wang; Li-C. Wang (ASP-DAC, 2001)

Verification and Validation of Complex Digital Systems: An Industrial Perspective. - Magdy S. Abadir; Li-C. Wang (ISQED, 2001)

Analysis of Testing Methodologies for Custom Designs in PowerPCTM Microprocessor. - Magdy S. Abadir; Juhong Zhu; Li-C. Wang (VTS, 2001)

Defect-Oriented Testing and Defective-Part-Level Prediction. - Jennifer Dworak; Jason D. Wicker; Sooryong Lee; Michael R. Grimaila; M. Ray Mercer; Kenneth M. Butler; Bret Stewart; Li-C. Wang (IEEE Des. Test Comput., 2001)

False-path-aware statistical timing analysis and efficient path selection for delay testing and timing validation. - Jing-Jia Liou; Angela Krstic; Li-C. Wang; Kwang-Ting Cheng (DAC, 2002)

Enhancing test efficiency for delay fault testing using multiple-clocked schemes. - Jing-Jia Liou; Li-C. Wang; Kwang-Ting Cheng; Jennifer Dworak; M. Ray Mercer; Rohit Kapur; Thomas W. Williams (DAC, 2002)

Fortuitous Detection and its Impact on Test Set Sizes Using Stuck-at and Transition Faults. - Jennifer Dworak; James Wingfield; Brad Cobb; Sooryong Lee; Li-C. Wang; M. Ray Mercer (DFT, 2002)

On theoretical and practical considerations of path selection for delay fault testing. - Jing-Jia Liou; Li-C. Wang; Kwang-Ting Cheng (ICCAD, 2002)

Analysis of Delay Test Effectiveness with a Multiple-Clock Scheme. - Jing-Jia Liou; Li-C. Wang; Kwang-Ting Cheng; Jennifer Dworak; M. Ray Mercer; Rohit Kapur; Thomas W. Williams (ITC, 2002)

Combining ATPG and Symbolic Simulation for Efficient Validation of Embedded Array Systems. - Ganapathy Parthasarathy; Madhu K. Iyer; Tao Feng 012; Li-C. Wang; Kwang-Ting Cheng; Magdy S. Abadir (ITC, 2002)

On Testing High-Performance Custom Circuits without Explicit Testing of the Internal Faults. - Li-C. Wang; Magdy S. Abadir; Juhong Zhu (ITC, 2002)

Validation and Verification of Complex Digital Systems: A Practical Perspective. - Li-C. Wang; Magdy S. Abadir (LATW, 2002)

Enhanced symbolic simulation for efficient verification of embedded array systems. - Tao Feng 012; Li-C. Wang; Kwang-Ting Cheng; Manish Pandey; Magdy S. Abadir (ASP-DAC, 2003)

Experience in critical path selection for deep sub-micron delay test and timing validation. - Jing-Jia Liou; Li-C. Wang; Angela Krstic; Kwang-Ting Cheng (ASP-DAC, 2003)

Delta-sigma modulator based mixed-signal BIST architecture for SoC. - Chee-Kian Ong; Kwang-Ting (Tim) Cheng; Li-C. Wang (ASP-DAC, 2003)

Enhancing diagnosis resolution for delay defects based upon statistical timing and statistical fault models. - Angela Krstic; Li-C. Wang; Kwang-Ting Cheng; Jing-Jia Liou; T. M. Mak (DAC, 2003)

A signal correlation guided ATPG solver and its applications for solving difficult industrial cases. - Feng Lu 002; Li-C. Wang; Kwang-Ting Cheng; John Moondanos; Ziyad Hanna (DAC, 2003)

Delay Defect Diagnosis Based Upon Statistical Timing Models - The First Step. - Angela Krstic; Li-C. Wang; Kwang-Ting Cheng; Jing-Jia Liou; Magdy S. Abadir (DATE, 2003)

A Circuit SAT Solver With Signal Correlation Guided Learning. - Feng Lu 002; Li-C. Wang; Kwang-Ting Cheng; Ric C.-Y. Huang (DATE, 2003)

A comparison of BDDs, BMC, and sequential SAT for model checking. - Ganapathy Parthasarathy; Madhu K. Iyer; Kwang-Ting Cheng; Li-C. Wang (HLDVT, 2003)

On Structural vs. Functional Testing for Delay Faults. - Angela Krstic; Jing-Jia Liou; Kwang-Ting Cheng; Li-C. Wang (ISQED, 2003)

Diagnosis-Based Post-Silicon Timing Validation Using Statistical Tools and Methodologies. - Angela Krstic; Li-C. Wang; Kwang-Ting Cheng; T. M. Mak (ITC, 2003)

Using Logic Models To Predict The Detection Behavior Of Statistical Timing Defects. - Li-C. Wang; Angela Krstic; Leonard Lee; Kwang-Ting Cheng; M. Ray Mercer; Thomas W. Williams; Magdy S. Abadir (ITC, 2003)

Diagnosis of Delay Defects Using Statistical Timing Models. - Angela Krstic; Li-C. Wang; Kwang-Ting Cheng; Jing-Jia Liou (VTS, 2003)

Enhanced Symbolic Simulation for Functional Verification of Embedded Array Systems. - Li-C. Wang; Tao Feng 012; Kwang-Ting (Tim) Cheng; Magdy S. Abadir; Manish Pandey (Des. Autom. Embed. Syst., 2003)

Guest Editors' Introduction: Speed Test and Speed Binning for Complex ICs. - Kenneth M. Butler; Kwang-Ting (Tim) Cheng; Li-C. Wang (IEEE Des. Test Comput., 2003)

Critical Path Selection for Deep Sub-Micron Delay Test and Timing Validation. - Jing-Jia Liou; Li-C. Wang; Angela Krstic; Kwang-Ting (Tim) Cheng (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003)

Improved symbolic simulation by functional-space decomposition. - Tao Feng 012; Li-C. Wang; Kwang-Ting Cheng (ASP-DAC, 2004)

Jitter spectral extraction for multi-gigahertz signal. - Chee-Kian Ong; Dongwoo Hong; Kwang-Ting Cheng; Li-C. Wang (ASP-DAC, 2004)

Efficient reachability checking using sequential SAT. - Ganapathy Parthasarathy; Madhu K. Iyer; Kwang-Ting Cheng; Li-C. Wang (ASP-DAC, 2004)

TranGen: a SAT-based ATPG for path-oriented transition faults. - Kai Yang; Kwang-Ting Cheng; Li-C. Wang (ASP-DAC, 2004)

An efficient finite-domain constraint solver for circuits. - Ganapathy Parthasarathy; Madhu K. Iyer; Kwang-Ting Cheng; Li-C. Wang (DAC, 2004)

On path-based learning and its applications in delay test and diagnosis. - Li-C. Wang; T. M. Mak; Kwang-Ting Cheng; Magdy S. Abadir (DAC, 2004)

Improved Symoblic Simulation by Dynamic Funtional Space Partitioning. - Tao Feng 012; Li-C. Wang; Kwang-Ting Cheng; Chih-Chan Lin (DATE, 2004)

Pattern Selection for Testing of Deep Sub-Micron Timing Defects. - Mango Chia-Tso Chao; Li-C. Wang; Kwang-Ting Cheng (DATE, 2004)

Random Jitter Extraction Technique in a Multi-Gigahertz Signal. - Chee-Kian Ong; Dongwoo Hong; Kwang-Ting Cheng; Li-C. Wang (DATE, 2004)

Regression Simulation: Applying Path-Based Learning In Delay Test and Post-Silicon Validation. - Li-C. Wang (DATE, 2004)

On using a 2-domain partitioned OBDD data structure in verification. - Tao Feng 012; Li-C. Wang; Kwang-Ting Cheng; Andy Lin (HLDVT, 2004)

A path-based methodology for post-silicon timing validation. - Leonard Lee; Li-C. Wang; T. M. Mak; Kwang-Ting Cheng (ICCAD, 2004)

Static statistical timing analysis for latch-based pipeline designs. - Rob A. Rutenbar; Li-C. Wang; Kwang-Ting Cheng; Sandip Kundu (ICCAD, 2004)

On Correlating Structural Tests with Functional Tests for Speed Binning of High Performance Design. - Jing Zeng; Magdy S. Abadir; A. Kolhatkar; G. Vandling; Li-C. Wang; Jacob A. Abraham (ITC, 2004)

On Correlating Structural Tests with Functional Tests for Speed Binning of High Performance Design. - Jing Zeng; Magdy S. Abadir; G. Vandling; Li-C. Wang; S. Karako; Jacob A. Abraham (MTV, 2004)

A Scalable On-Chip Jitter Extraction Technique. - Chee-Kian Ong; Dongwoo Hong; Kwang-Ting Cheng; Li-C. Wang (VTS, 2004)

Guest Editors' Introduction: The Verification and Test of Complex Digital ICs. - Magdy S. Abadir; Li-C. Wang (IEEE Des. Test Comput., 2004)

New Challenges in Delay Testing of Nanometer, Multigigahertz Designs. - T. M. Mak; Angela Krstic; Kwang-Ting (Tim) Cheng; Li-C. Wang (IEEE Des. Test Comput., 2004)

Safety Property Verification Using Sequential SAT and Bounded Model Checking. - Ganapathy Parthasarathy; Madhu K. Iyer; Kwang-Ting Cheng; Li-C. Wang (IEEE Des. Test Comput., 2004)

A Signal Correlation Guided Circuit-SAT Solver. - Feng Lu 002; Li-C. Wang; Kwang-Ting (Tim) Cheng; John Moondanos; Ziyad Hanna (J. Univers. Comput. Sci., 2004)

Multilevel circuit clustering for delay minimization. - Cliff C. N. Sze; Ting-Chi Wang; Li-C. Wang (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004)

Critical path selection for delay fault testing based upon a statistical timing model. - Li-C. Wang; Jing-Jia Liou; Kwang-Ting Cheng (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004)

A new sigma-delta modulator architecture for testing using digital stimulus. - Chee-Kian Ong; Kwang-Ting Cheng; Li-C. Wang (IEEE Trans. Circuits Syst. I Regul. Pap., 2004)

An Efficient Sequential SAT Solver With Improved Search Strategies. - Feng Lu 002; Madhu K. Iyer; Ganapathy Parthasarathy; Li-C. Wang; Kwang-Ting Cheng; Kuang-Chien Chen (DATE, 2005)

On Generating Tests to Cover Diverse Worst-Case Timing Corners. - Leonard Lee; Sean H. Wu; Charles H.-P. Wen; Li-C. Wang (DFT, 2005)

Hazard-aware statistical timing simulation and its applications in screening frequency-dependent defects. - Benjamin N. Lee; Hui Li; Li-C. Wang; Magdy S. Abadir (ITC, 2005)

Simulation-based target test generation techniques for improving the robustness of a software-based-self-test methodology. - Charles H.-P. Wen; Li-C. Wang; Kwang-Ting Cheng; Wei-Ting Liu; Ji-Jan Chen (ITC, 2005)

Simulation Data Mining for Functional Test Pattern Justification. - Charles H.-P. Wen; Li-C. Wang (MTV, 2005)

Reducing Pattern Delay Variations for Screening Frequency Dependent Defects. - Benjamin N. Lee; Li-C. Wang; Magdy S. Abadir (VTS, 2005)

On Silicon-Based Speed Path Identification. - Leonard Lee; Li-C. Wang; Praveen Parvathala; T. M. Mak (VTS, 2005)

On A Software-Based Self-Test Methodology and Its Application. - Charles H.-P. Wen; Li-C. Wang; Kwang-Ting Cheng; Kai Yang; Wei-Ting Liu; Ji-Jan Chen (VTS, 2005)

Using 2-domain partitioned OBDD data structure in an enhanced symbolic simulator. - Tao Feng 012; Li-C. Wang; Kwang-Ting Cheng; Chih-Chan Lin (ACM Trans. Design Autom. Electr. Syst., 2005)

Refined statistical static timing analysis through. - Benjamin N. Lee; Li-C. Wang; Magdy S. Abadir (DAC, 2006)

Extracting a simplified view of design functionality via vector simulation. - Onur Guzey; Charles H.-P. Wen; Li-C. Wang; Tao Feng 012; Magdy S. Abadir (HLDVT, 2006)

Extracting a Simplified View of Design Functionality Based on Vector Simulation. - Onur Guzey; Charles H.-P. Wen; Li-C. Wang; Tao Feng 012; Hillel Miller; Magdy S. Abadir (Haifa Verification Conference, 2006)

On bounding the delay of a critical path. - Leonard Lee; Li-C. Wang (ICCAD, 2006)

Simulation-based functional test justification using a decision-digram-based Boolean data miner. - Charles H.-P. Wen; Onur Guzey; Li-C. Wang (ICCD, 2006)

An Efficient Pruning Method to Guide the Search of Precision Tests in Statistical Timing Space. - Leonard Lee; Li-C. Wang (ITC, 2006)

Issues on Test Optimization with Known Good Dies and Known Defective Dies - A Statistical Perspective. - Benjamin N. Lee; Li-C. Wang; Magdy S. Abadir (ITC, 2006)

Simulation-Based Functional Test Generation for Embedded Processors. - Charles H.-P. Wen; Li-C. Wang; Kwang-Ting Cheng (IEEE Trans. Computers, 2006)

Design-Silicon Timing Correlation A Data Mining Perspective. - Li-C. Wang; Pouria Bastani; Magdy S. Abadir (DAC, 2007)

Coverage-directed test generation through automatic constraint extraction. - Onur Guzey; Li-C. Wang (HLDVT, 2007)

An incremental learning framework for estimating signal controllability in unit-level verification. - Charles H.-P. Wen; Li-C. Wang; Jayanta Bhadra (ICCAD, 2007)

Analyzing the risk of timing modeling based on path delay tests. - Pouria Bastani; Benjamin N. Lee; Li-C. Wang; Savithri Sundareswaran; Magdy S. Abadir (ITC, 2007)

Enhancing signal controllability in functional test-benches through automatic constraint extraction. - Onur Guzey; Li-C. Wang; Jayanta Bhadra (ITC, 2007)

Statistical analysis and optimization of parametric delay test. - Sean Hsi Yuan Wu; Benjamin N. Lee; Li-C. Wang; Magdy S. Abadir (ITC, 2007)

Guest Editors' Introduction: Attacking Functional Verification through Hybrid Techniques. - Jayanta Bhadra; Magdy S. Abadir; Li-C. Wang (IEEE Des. Test Comput., 2007)

A Survey of Hybrid Techniques for Functional Verification. - Jayanta Bhadra; Magdy S. Abadir; Li-C. Wang; Sandip Ray (IEEE Des. Test Comput., 2007)

Refining Delay Test Methodology Using Knowledge of Asymmetric Transition Delay. - Sean H. Wu; Sreejit Chakravarty; Alexander Tetelbaum; Li-C. Wang (ATS, 2008)

Statistical diagnosis of unmodeled systematic timing effects. - Pouria Bastani; Nicholas Callegari; Li-C. Wang; Magdy S. Abadir (DAC, 2008)

Speedpath prediction based on learning from a small set of examples. - Pouria Bastani; Kip Killpack; Li-C. Wang; Eli Chiprout (DAC, 2008)

Functional test selection based on unsupervised support vector analysis. - Onur Guzey; Li-C. Wang; Jeremy R. Levitt; Harry Foster (DAC, 2008)

Diagnosis of design-silicon timing mismatch with feature encoding and importance ranking - the methodology explained. - Pouria Bastani; Nicholas Callegari; Li-C. Wang; Magdy S. Abadir (ITC, 2008)

A Study of Outlier Analysis Techniques for Delay Testing. - Sean H. Wu; Dragoljub Gagi Drmanac; Li-C. Wang (ITC, 2008)

Linking Statistical Learning to Diagnosis. - Pouria Bastani; Li-C. Wang; Magdy S. Abadir (IEEE Des. Test Comput., 2008)

A Clock-Less Jitter Spectral Analysis Technique. - Chee-Kian Ong; Dongwoo Hong; Kwang-Ting Cheng; Li-C. Wang (IEEE Trans. Circuits Syst. I Regul. Pap., 2008)

Path selection for monitoring unexpected systematic timing effects. - Nicholas Callegari; Pouria Bastani; Li-C. Wang; Sreejit Chakravarty; Alexander Tetelbaum (ASP-DAC, 2009)

Speedpath analysis based on hypothesis pruning and ranking. - Nicholas Callegari; Li-C. Wang; Pouria Bastani (DAC, 2009)

Predicting variability in nanoscale lithography processes. - Dragoljub Gagi Drmanac; Frank Liu 001; Li-C. Wang (DAC, 2009)

Data Learning Techniques for Functional/System Fmax Prediction. - Li-C. Wang (DFT, 2009)

Feature based similarity search with application to speedpath analysis. - Nicholas Callegari; Li-C. Wang; Pouria Bastani (ITC, 2009)

Data learning techniques and methodology for Fmax prediction. - Janine Chen; Li-C. Wang; Po-Hsien Chang; Jing Zeng; S. Yu; Michael Mateja (ITC, 2009)

Minimizing outlier delay test cost in the presence of systematic variability. - Dragoljub Gagi Drmanac; Brendon Bolin; Li-C. Wang; Magdy S. Abadir (ITC, 2009)

A Statistical Diagnosis Approach for Analyzing Design-Silicon Timing Mismatch. - Nicholas Callegari; Pouria Bastani; Li-C. Wang; Magdy S. Abadir (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009)

Automatic assertion extraction via sequential data mining of simulation traces. - Po-Hsien Chang; Li-C. Wang (ASP-DAC, 2010)

Correlating system test Fmax with structural test Fmax and process monitoring measurements. - Janine Chen; Jing Zeng; Li-C. Wang; Michael Mateja (ASP-DAC, 2010)

Data learning based diagnosis. - Li-C. Wang (ASP-DAC, 2010)

Classification rule learning using subgroup discovery of cross-domain attributes responsible for design-silicon mismatch. - Nicholas Callegari; Dragoljub Gagi Drmanac; Li-C. Wang; Magdy S. Abadir (DAC, 2010)

Online selection of effective functional test programs based on novelty detection. - Po-Hsien Chang; Dragoljub Gagi Drmanac; Li-C. Wang (ICCAD, 2010)

A new sampling method for analog behavioral modeling. - Hui Li; Makram Mansour; Sury Maturi; Li-C. Wang (ISCAS, 2010)

A non-parametric approach to behavioral device modeling. - Dragoljub Gagi Drmanac; Brendon Bolin; Li-C. Wang (ISQED, 2010)

Analog behavioral modeling flow using statistical learning method. - Hui Li; Makram Mansour; Sury Maturi; Li-C. Wang (ISQED, 2010)

On evaluating speed path detection of structural tests. - Jing Zeng; Jing Wang; Chia-Ying Chen; Michael Mateja; Li-C. Wang (ISQED, 2010)

A kernel-based approach for functional test program generation. - Po-Hsien Chang; Li-C. Wang; Jayanta Bhadra (ITC, 2010)

Mining AC delay measurements for understanding speed-limiting paths. - Janine Chen; Brendon Bolin; Li-C. Wang; Jing Zeng; Dragoljub Gagi Drmanac; Michael Mateja (ITC, 2010)

Selecting the most relevant structural Fmax for system Fmax correlation. - Janine Chen; Jing Zeng; Li-C. Wang; Jeff Rearick; Michael Mateja (VTS, 2010)

Impact of multiple input switching on delay test under process variation. - Sean H. Wu; Sreejit Chakravarty; Li-C. Wang (VTS, 2010)

Feature-Ranking Methodology to Diagnose Design-Silicon Timing Mismatch. - Pouria Bastani; Nicholas Callegari; Li-C. Wang; Magdy S. Abadir (IEEE Des. Test Comput., 2010)

Increasing the Efficiency of Simulation-Based Functional Verification Through Unsupervised Support Vector Analysis. - Onur Guzey; Li-C. Wang; Jeremy R. Levitt; Harry Foster (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010)

Multidimensional parametric test set optimization of wafer probe data for predicting in field failures and setting tighter test limits. - Dragoljub Gagi Drmanac; Nik Sumikawa; LeRoy Winemberg; Li-C. Wang; Magdy S. Abadir (DATE, 2011)

Forward prediction based on wafer sort data - A case study. - Nik Sumikawa; Dragoljub Gagi Drmanac; Li-C. Wang; LeRoy Winemberg; Magdy S. Abadir (ITC, 2011)

Understanding customer returns from a test perspective. - Nik Sumikawa; Dragoljub Gagi Drmanac; Li-C. Wang; LeRoy Winemberg; Magdy S. Abadir (VTS, 2011)

Novel test detection to improve simulation efficiency - A commercial experiment. - Wen Chen 016; Nik Sumikawa; Li-C. Wang; Jayanta Bhadra; Xiushan Feng; Magdy S. Abadir (ICCAD, 2012)

Functional test content optimization for peak-power validation - An experimental study. - Vinayak Kamath; Wen Chen 016; Nik Sumikawa; Li-C. Wang (ITC, 2012)

Screening customer returns with multivariate test analysis. - Nik Sumikawa; Jeff Tikkanen; Li-C. Wang; LeRoy Winemberg; Magdy S. Abadir (ITC, 2012)

An experiment of burn-in time reduction based on parametric test analysis. - Nik Sumikawa; Li-C. Wang; Magdy S. Abadir (ITC, 2012)

Data mining based prediction paradigm and its applications in design automation. - Magdy S. Abadir; Nik Sumikawa; Wen Chen 016; Li-C. Wang (VLSI-DAT, 2012)

Foreword. - An-Yeu Wu; Li-C. Wang (VLSI-DAT, 2012)

Introduction to special section on verification challenges in the concurrent world. - Sandip Ray; Jayanta Bhadra; Magdy S. Abadir; Li-C. Wang; Aarti Gupta (ACM Trans. Design Autom. Electr. Syst., 2012)

Simulation knowledge extraction and reuse in constrained random processor verification. - Wen Chen 016; Li-C. Wang; Jay Bhadra; Magdy S. Abadir (DAC, 2013)

Data mining in design and test processes: basic principles and promises. - Li-C. Wang (ISPD, 2013)

A pattern mining framework for inter-wafer abnormality analysis. - Nik Sumikawa; Li-C. Wang; Magdy S. Abadir (ITC, 2013)

Analyzing Efficacy of Constrained Test Program Generators - A Case Study. - Vinayak Kamath; Farhan Rahman; Li-C. Wang (MTV, 2013)

Novel test analysis to improve structural coverage - A commercial experiment. - Wen Chen 016; Li-C. Wang; Jayanta Bhadra; Magdy S. Abadir (VLSI-DAT, 2013)

Guest Editorial: Test and Verification Challenges for Future Microprocessors and SoC Designs. - Sandip Ray; Jay Bhadra; Magdy S. Abadir; Li-C. Wang (J. Electron. Test., 2013)

Data Mining In EDA - Basic Principles, Promises, and Constraints. - Li-C. Wang; Magdy S. Abadir (DAC, 2014)

On application of data mining in functional debug. - Kuo-Kai Hsieh; Wen Chen 016; Li-C. Wang; Jayanta Bhadra (ICCAD, 2014)

Multivariate outlier modeling for capturing customer returns - How simple it can be. - Jeff Tikkanen; Nik Sumikawa; Li-C. Wang; Magdy S. Abadir (IOLTS, 2014)

Yield optimization using advanced statistical correlation methods. - Jeff Tikkanen; Sebastian Siatkowski; Nik Sumikawa; Li-C. Wang; Magdy S. Abadir (ITC, 2014)

Design trends and test challenges in automotive electronics. - Li-C. Wang (VLSI-DAT, 2014)

Data mining in functional test content optimization. - Li-C. Wang (ASP-DAC, 2015)

Machine Learning in Simulation-Based Analysis. - Li-C. Wang; Malgorzata Marek-Sadowska (ISPD, 2015)

Generalization of an outlier model into a "global" perspective. - Sebastian Siatkowski; Chia-Ling Chang; Li-C. Wang; Nikolas Sumikawa; LeRoy Winemberg; W. Robert Daasch (ITC, 2015)

Session 4B - Panel data analytics in semiconductor manufacturing. - Suriyaprakash Natarajan; Li-C. Wang (VTS, 2016)

Consistency in wafer based outlier screening. - Sebastian Siatkowski; Chuanhe Jay Shan; Li-C. Wang; Nikolas Sumikawa; W. Robert Daasch; John M. Carulli (VTS, 2016)

ITC and the Future of Test - We've Won. - Ron Press; Li-C. Wang (IEEE Des. Test, 2016)

Feature extraction from design documents to enable rule learning for improving assertion coverage. - Kuo-Kai Hsieh; Sebastian Siatkowski; Li-C. Wang; Wen Chen 016; Jayanta Bhadra (ASP-DAC, 2017)

Learning to Produce Direct Tests for Security Verification Using Constrained Process Discovery. - Kuo-Kai Hsieh; Li-C. Wang; Wen Chen 016; Jayanta Bhadra (DAC, 2017)

Systematic defect detection methodology for volume diagnosis: A data mining perspective. - Chuanhe Jay Shan; Pietro Babighian; Yan Pan; John M. Carulli; Li-C. Wang (ITC, 2017)

Kernel based clustering for quality improvement and excursion detection. - Nik Sumikawa; Matt Nero; Li-C. Wang (ITC, 2017)

Some considerations on choosing an outlier method for automotive product lines. - Li-C. Wang; Sebastian Siatkowski; Chuanhe Jay Shan; Matthew Nero; Nikolas Sumikawa; LeRoy Winemberg (ITC, 2017)

Dynamic Exerciser Template Weighting in x86 Processor Verification. - Ahmed Wahba; Justin Hohnerlein; Farhan Rahman; Li-C. Wang (MTV, 2017)

Learning the process for correlation analysis. - Sebastian Siatkowski; Li-C. Wang; Nik Sumikawa; LeRoy Winemberg (VTS, 2017)

Guest Editors' Introduction: Emerging Challenges and Solutions in SoC Verification. - Magdy S. Abadir; Jayanta Bhadra; Wen Chen 016; Li-C. Wang (IEEE Des. Test, 2017)

Data-Driven Test Plan Augmentation for Platform Verification. - Wen Chen 016; Kuo-Kai Hsieh; Li-Chung Wang; Jayanta Bhadra (IEEE Des. Test, 2017)

Challenges and Trends in Modern SoC Design Verification. - Wen Chen 016; Sandip Ray; Jayanta Bhadra; Magdy S. Abadir; Li-C. Wang (IEEE Des. Test, 2017)

Experience of Data Analytics in EDA and Test - Principles, Promises, and Challenges. - Li-C. Wang (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017)

Machine Learning for Feature-Based Analytics. - Li-C. Wang (ISPD, 2018)

Concept Recognition in Production Yield Data Analytics. - Matthew Nero; Chuanhe Jay Shan; Li-C. Wang; Nik Sumikawa (ITC, 2018)

An Autonomous System View To Apply Machine Learning. - Li-C. Wang (ITC, 2018)

Special session on machine learning for test and diagnosis. - Krishnendu Chakrabarty; Li-C. Wang; Gaurav Veda; Yu Huang 005 (VTS, 2018)

A Concept Learning Tool Based On Calculating Version Space Cardinality. - Kuo-Kai Hsieh; Li-C. Wang (CoRR, 2018)

Discovering Interesting Plots in Production Yield Data Analytics. - Matthew Nero; Chuanhe Jay Shan; Li-C. Wang; Nik Sumikawa (CoRR, 2018)

Facilitating Deployment Of A Wafer-Based Analytic Software Using Tensor Methods: Invited Paper. - Li-C. Wang; Chuanhe Jay Shan; Ahmed Wahba (ICCAD, 2019)

Wafer Plot Classification Using Neural Networks and Tensor Methods. - Ahmed Wahba; Chuanhe Jay Shan; Li-C. Wang; Nik Sumikawa (ITC-Asia, 2019)

Deploying A Machine Learning Solution As A Surrogate. - Chuanhe Jay Shan; Ahmed Wahba; Li-C. Wang; Nik Sumikawa (ITC, 2019)

Primitive Concept Identification In A Given Set Of Wafer Maps. - Ahmed Wahba; Chuanhe Jay Shan; Li-C. Wang; Nik Sumikawa (VLSI-DAT, 2019)

Wafer Pattern Recognition Using Tucker Decomposition. - Ahmed Wahba; Li-C. Wang; Zheng Zhang 005; Nik Sumikawa (VTS, 2019)

Learning A Wafer Feature With One Training Sample. - Yueling Jenny Zeng; Li-C. Wang; Chuanhe Jay Shan; Nik Sumikawa (ITC, 2020)

MINiature Interactive Offset Networks (MINIONs) for Wafer Map Classification. - Yueling Jenny Zeng; Li-C. Wang; Chuanhe Jay Shan (ITC, 2021)

Wafer Map Pattern Analytics Driven By Natural Language Queries. - Yueling Jenny Zeng; Min Jian Yang; Li-C. Wang (ITC-Asia, 2022)

Language Driven Analytics for Failure Pattern Feedforward and Feedback. - Min Jian Yang; Yueling Zeng; Li-C. Wang (ITC, 2022)

IEA-Plot: Conducting Wafer-Based Data Analytics Through Chat. - Matthew Dupree; Min Jian Yang; Yueling Jenny Zeng; Li-C. Wang (ITC, 2023)

Welcome Message ITC 2023. - Li-C. Wang; Jeff Rearick (ITC, 2023)

Domain Knowledge Graph Construction Via A Simple Checker. - Yueling Zeng; Li-C. Wang (CoRR, 2023)

WM-Graph: Graph-Based Approach for Wafermap Analytics. - Min Jian Yang; Yueling Jenny Zeng; Li-C. Wang (ITC, 2024)

LLM-Assisted Analytics in Semiconductor Test (Invited). - Li-C. Wang (MLCAD, 2024)

Oracle-Checker Scheme for Evaluating a Generative Large Language Model. - Yueling Jenny Zeng; Li-C. Wang; Thomas Ibbetson (CoRR, 2024)

IEA-Plugin: An AI Agent Reasoner for Test Data Analytics. - Seoyeon Kim; Yu Su; Li-C. Wang (CoRR, 2025)