Test architecture design and optimization for three-dimensional SoCs. - Li Jiang 002; Lin Huang 002; Qiang Xu 001 (DATE, 2009)

Layout-driven test-architecture design and optimization for 3D SoCs under pre-bond test-pin-count constraint. - Li Jiang 002; Qiang Xu 001; Krishnendu Chakrabarty; T. M. Mak (ICCAD, 2009)

Yield enhancement for 3D-stacked memory by redundancy sharing across dies. - Li Jiang 002; Rong Ye; Qiang Xu 001 (ICCAD, 2010)

Modeling TSV open defects in 3D-stacked DRAM. - Li Jiang 002; Yuxi Liu; Lian Duan; Yuan Xie 001; Qiang Xu 001 (ITC, 2010)

Yield enhancement for 3D-stacked ICs: Recent advances and challenges. - Qiang Xu 001; Li Jiang 002; Huiyun Li; Bill Eklow (ASP-DAC, 2012)

On effective TSV repair for 3D-stacked ICs. - Li Jiang 002; Qiang Xu 001; Bill Eklow (DATE, 2012)

Integrated Test-Architecture Optimization and Thermal-Aware Test Scheduling for 3-D SoCs Under Pre-Bond Test-Pin-Count Constraint. - Li Jiang 002; Qiang Xu 001; Krishnendu Chakrabarty; T. M. Mak (IEEE Trans. Very Large Scale Integr. Syst., 2012)

On effective and efficient in-field TSV repair for stacked 3D ICs. - Li Jiang 002; Fangming Ye; Qiang Xu 001; Krishnendu Chakrabarty; Bill Eklow (DAC, 2013)

AgentDiag: An agent-assisted diagnostic framework for board-level functional failures. - Zelong Sun; Li Jiang 002; Qiang Xu 001; Zhaobo Zhang; Zhiyuan Wang; Xinli Gu (ITC, 2013)

On Effective Through-Silicon Via Repair for 3-D-Stacked ICs. - Li Jiang 002; Qiang Xu 001; Bill Eklow (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013)

On test syndrome merging for reasoning-based board-level functional fault diagnosis. - Zelong Sun; Li Jiang 002; Qiang Xu 001; Zhaobo Zhang; Zhiyuan Wang; Xinli Gu (ASP-DAC, 2015)

Jump test for metallic CNTs in CNFET-based SRAM. - Feng Xie; Xiaoyao Liang; Qiang Xu 001; Krishnendu Chakrabarty; Naifeng Jing; Li Jiang 002 (DAC, 2015)

A novel TSV probing technique with adhesive test interposer. - Li Jiang 002; Xiangwei Huang; Hongfeng Xie; Qiang Xu 001; Chao Li 009; Xiaoyao Liang; Huiyun Li (ICCD, 2015)

Building Fuel Powered Supercomputing Data Center at Low Cost. - Yiqing Hua; Chao Li 009; Weichao Tang; Li Jiang 002; Xiaoyao Liang (ICS, 2015)

Bank stealing for conflict mitigation in GPGPU Register File. - Naifeng Jing; Shuang Chen 002; Shunning Jiang; Li Jiang 002; Chao Li 009; Xiaoyao Liang (ISLPED, 2015)

On diagnosable and tunable 3D clock network design for lifetime reliability enhancement. - Li Jiang 002; Pu Pang; Naifeng Jing; Sung Kyu Lim; Xiaoyao Liang; Qiang Xu 001 (ITC, 2015)

Yield and reliability enhancement for 3D ICs: Dissertation summary: IEEE TTTC E.J. McCluskey doctoral thesis award competition finalist. - Li Jiang 002; Qiang Xu 001 (ITC, 2015)

Fault-Tolerant 3D-NoC Architecture and Design: Recent Advances and Challenges. - Li Jiang 002; Qiang Xu 001 (NOCS, 2015)

On microarchitectural modeling for CNFET-based circuits. - Tianjian Li; Hao Chen 099; Weikang Qian; Xiaoyao Liang; Li Jiang 002 (SoCC, 2015)

Timing-driven placement for carbon nanotube circuits. - Chen Wang 072; Li Jiang 002; Shiyan Hu 001; Tianjian Li; Xiaoyao Liang; Naifeng Jing; Weikang Qian (SoCC, 2015)

A Low-Cost TSV Test and Diagnosis Scheme Based on Binary Search Method. - Xiaolong Zhang; Huiyun Li; Li Jiang 002; Qiang Xu 001 (IEEE Trans. Very Large Scale Integr. Syst., 2015)

CNFET-based high throughput register file architecture. - Tianjian Li; Li Jiang 002; Naifeng Jing; Nam Sung Kim; Xiaoyao Liang (ICCD, 2016)

Applying Victim Cache in High Performance GPGPU Computing. - Fengfeng Fan; Jianfei Wang; Li Jiang 002; Xiaoyao Liang; Naifeng Jing (ISPDC, 2016)

Defect tolerance for CNFET-based SRAMs. - Tianjian Li; Li Jiang 002; Xiaoyao Liang; Qiang Xu 001; Krishnendu Chakrabarty (ITC, 2016)

Cache-emulated register file: An integrated on-chip memory architecture for high performance GPGPUs. - Naifeng Jing; Jianfei Wang; Fengfeng Fan; Wenkang Yu; Li Jiang 002; Chao Li 009; Xiaoyao Liang (MICRO, 2016)

Energy-Efficient eDRAM-Based On-Chip Storage Architecture for GPGPUs. - Naifeng Jing; Li Jiang 002; Tao Zhang 046; Chao Li 009; Fengfeng Fan; Xiaoyao Liang (IEEE Trans. Computers, 2016)

A Novel Test Method for Metallic CNTs in CNFET-Based SRAMs. - Tianjian Li; Feng Xie; Xiaoyao Liang; Qiang Xu 001; Krishnendu Chakrabarty; Naifeng Jing; Li Jiang 002 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016)

Sneak-Path Based Test and Diagnosis for 1R RRAM Crossbar Using Voltage Bias Technique. - Tianjian Li; Xiangyu Bi; Naifeng Jing; Xiaoyao Liang; Li Jiang 002 (DAC, 2017)

On Quality Trade-off Control for Approximate Computing Using Iterative Training. - Chengwen Xu; Xiangyu Wu; Wenqi Yin; Qiang Xu 001; Naifeng Jing; Xiaoyao Liang; Li Jiang 002 (DAC, 2017)

Accelerator-friendly neural-network training: Learning variations and defects in RRAM crossbar. - Lerong Chen; Jiawen Li; Yiran Chen 001; Qiuping Deng; Jiyuan Shen; Xiaoyao Liang; Li Jiang 002 (DATE, 2017)

Fault clustering technique for 3D memory BISR. - Tianjian Li; Yan Han; Xiaoyao Liang; Hsien-Hsin S. Lee; Li Jiang 002 (DATE, 2017)

Incorporating selective victim cache into GPGPU for high-performance computing. - Jianfei Wang; Fengfeng Fan; Li Jiang 002; Xiaoyao Liang; Naifeng Jing (Concurr. Comput. Pract. Exp., 2017)

Bank Stealing for a Compact and Efficient Register File Architecture in GPGPU. - Naifeng Jing; Shunning Jiang; Shuang Chen 002; Jingjie Zhang; Li Jiang 002; Chao Li 009; Xiaoyao Liang (IEEE Trans. Very Large Scale Integr. Syst., 2017)

ReCom: An efficient resistive accelerator for compressed deep neural networks. - Houxiang Ji; Linghao Song; Li Jiang 002; Hai Helen Li; Yiran Chen 001 (DATE, 2018)

In-growth test for monolithic 3D integrated SRAM. - Pu Pang; Yixun Zhang; Tianjian Li; Sung Kyu Lim; Quan Chen 002; Xiaoyao Liang; Li Jiang 002 (DATE, 2018)

A FPGA Friendly Approximate Computing Framework with Hybrid Neural Networks: (Abstract Only). - Haiyue Song; Xiang Song; Tianjian Li; Hao Dong; Naifeng Jing; Xiaoyao Liang; Li Jiang 002 (FPGA, 2018)

AXNet: approximate computing using an end-to-end trainable neural network. - Zhenghao Peng; Xuyang Chen; Chengwen Xu; Naifeng Jing; Xiaoyao Liang; Cewu Lu; Li Jiang 002 (ICCAD, 2018)

Invocation-driven neural approximate computing with a multiclass-classifier and multiple approximators. - Haiyue Song; Chengwen Xu; Qiang Xu 001; Zhuoran Song; Naifeng Jing; Xiaoyao Liang; Li Jiang 002 (ICCAD, 2018)

Approximate Random Dropout. - Zhuoran Song; Dongyu Ru; Ru Wang 002; Hongru Huang; Zhenghao Peng; Jing Ke; Xiaoyao Liang; Li Jiang 002 (CoRR, 2018)

CNFET-Based High Throughput SIMD Architecture. - Li Jiang 002; Tianjian Li; Naifeng Jing; Nam Sung Kim; Minyi Guo; Xiaoyao Liang (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

Variation-Aware Global Placement for Improving Timing-Yield of Carbon-Nanotube Field Effect Transistor Circuit. - Chen Wang 072; Yanan Sun 003; Shiyan Hu 001; Li Jiang 002; Weikang Qian (ACM Trans. Design Autom. Electr. Syst., 2018)

IBOM: An Integrated and Balanced On-Chip Memory for High Performance GPGPUs. - Jianfei Wang; Qin Wang 009; Li Jiang 002; Chao Li 009; Xiaoyao Liang; Naifeng Jing (IEEE Trans. Parallel Distributed Syst., 2018)

HUBPA: high utilization bidirectional pipeline architecture for neuromorphic computing. - Houxiang Ji; Li Jiang 002; Tianjian Li; Naifeng Jing; Jing Ke; Xiaoyao Liang (ASP-DAC, 2019)

A sharing-aware L1.5D cache for data reuse in GPGPUs. - Jianfei Wang; Li Jiang 002; Jing Ke; Xiaoyao Liang; Naifeng Jing (ASP-DAC, 2019)

System-level hardware failure prediction using deep learning. - Xiaoyi Sun; Krishnendu Chakrabarty; Ruirui Huang; Yiquan Chen; Bing Zhao; Hai Cao; Yinhe Han 001; Xiaoyao Liang; Li Jiang 002 (DAC, 2019)

Approximate Random Dropout for DNN training acceleration in GPGPU. - Zhuoran Song; Ru Wang 002; Dongyu Ru; Zhenghao Peng; Hongru Huang; Hai Zhao; Xiaoyao Liang; Li Jiang 002 (DATE, 2019)

An Ultra-Efficient Memristor-Based DNN Framework with Structured Weight Pruning and Quantization Using ADMM. - Geng Yuan; Xiaolong Ma; Caiwen Ding; Sheng Lin 001; Tianyun Zhang; Zeinab S. Jalali; Yilong Zhao; Li Jiang 002; Sucheta Soundarajan; Yanzhi Wang (ISLPED, 2019)

Energy-Efficient Nonvolatile SRAM Design Based on Resistive Switching Multi-Level Cells. - Yanan Sun 003; Jiawei Gu; Weifeng He; Qin Wang 009; Naifeng Jing; Zhigang Mao; Weikang Qian; Li Jiang 002 (IEEE Trans. Circuits Syst. II Express Briefs, 2019)

Energy-Efficient and Quality-Assured Approximate Computing Framework Using a Co-Training Method. - Li Jiang 002; Zhuoran Song; Haiyue Song; Chengwen Xu; Qiang Xu 001; Naifeng Jing; Weifeng Zhang 003; Xiaoyao Liang (ACM Trans. Design Autom. Electr. Syst., 2019)

PIM-Prune: Fine-Grain DCNN Pruning for Crossbar-Based Process-In-Memory Architecture. - Chaoqun Chu; Yanzhi Wang; Yilong Zhao; Xiaolong Ma; Shaokai Ye; Yunyan Hong; Xiaoyao Liang; Yinhe Han 001; Li Jiang 002 (DAC, 2020)

GPNPU: Enabling Efficient Hardware-Based Direct Convolution with Multi-Precision Support in GPU Tensor Cores. - Zhuoran Song; Jianfei Wang; Tianjian Li; Li Jiang 002; Jing Ke; Xiaoyao Liang; Naifeng Jing (DAC, 2020)

Go Unary: A Novel Synapse Coding and Mapping Scheme for Reliable ReRAM-based Neuromorphic Computing. - Chang Ma; Yanan Sun 003; Weikang Qian; Ziqi Meng; Rui Yang; Li Jiang 002 (DATE, 2020)

A Winograd-Based CNN Accelerator with a Fine-Grained Regular Sparsity Pattern. - Tao Yang 031; Yunkun Liao; Jianping Shi; Yun Liang 001; Naifeng Jing; Li Jiang 002 (FPL, 2020)

ESNreram: An Energy-Efficient Sparse Neural Network Based on Resistive Random-Access Memory. - Zhuoran Song; Yilong Zhao; Yanan Sun 003; Xiaoyao Liang; Li Jiang 002 (ACM Great Lakes Symposium on VLSI, 2020)

DRQ: Dynamic Region-based Quantization for Deep Neural Network Acceleration. - Zhuoran Song; Bangqi Fu; Feiyang Wu; Zhaoming Jiang; Li Jiang 002; Naifeng Jing; Xiaoyao Liang (ISCA, 2020)

LSTM-based Analysis of Temporally- and Spatially-Correlated Signatures for Intermittent Fault Detection. - Xingyi Wang; Li Jiang 002; Krishnendu Chakrabarty (VTS, 2020)

AUSN: Approximately Uniform Quantization by Adaptively Superimposing Non-uniform Distribution for Deep Neural Networks. - Fangxin Liu; Wenbo Zhao 005; Yanzhi Wang; Changzhi Dai; Li Jiang 002 (CoRR, 2020)

Measurement Scheduling for Cooperative Localization in Resource-Constrained Conditions. - Qi Yan 007; Li Jiang 002; Solmaz S. Kia (IEEE Robotics Autom. Lett., 2020)

Skimming and Scanning for Efficient Action Recognition in Untrimmed Videos. - Yunyan Hong; Ailing Zeng; Min Li 019; Cewu Lu; Li Jiang 002; Qiang Xu 001 (CISP-BMEI, 2021)

AdaptiveGCN: Efficient GCN Through Adaptively Sparsifying Graphs. - Dongyue Li; Tao Yang 031; Lun Du; Zhezhi He; Li Jiang 002 (CIKM, 2021)

Lazy-WL: A Wear-aware Load Balanced Data Redistribution Method for Efficient SSD Array Scaling. - Hanchen Guo; Zhehan Lin; Yunfei Gu; Chentao Wu; Li Jiang 002; Jie Li 002; Guangtao Xue; Minyi Guo (CLUSTER, 2021)

AppealNet: An Efficient and Highly-Accurate Edge/Cloud Collaborative Architecture for DNN Inference. - Min Li 019; Yu Li 007; Ye Tian 010; Li Jiang 002; Qiang Xu 001 (DAC, 2021)

PIMGCN: A ReRAM-Based PIM Design for Graph Convolutional Network Acceleration. - Tao Yang 031; Dongyue Li; Yibo Han; Yilong Zhao; Fangxin Liu; Xiaoyao Liang; Zhezhi He; Li Jiang 002 (DAC, 2021)

Digital Offset for RRAM-based Neuromorphic Computing: A Novel Solution to Conquer Cycle-to-cycle Variation. - Ziqi Meng; Weikang Qian; Yilong Zhao; Yanan Sun 003; Rui Yang; Li Jiang 002 (DATE, 2021)

IM3A: Boosting Deep Neural Network Efficiency via In-Memory Addressing-Assisted Acceleration. - Fangxin Liu; Wenbo Zhao 005; Zongwu Wang; Tao Yang 031; Li Jiang 002 (ACM Great Lakes Symposium on VLSI, 2021)

Energy-Efficient Hybrid-RAM with Hybrid Bit-Serial based VMM Support. - Chen Nie; Jie Lin 004; Huan Hu; Li Jiang 002; Xiaoyao Liang; Zhezhi He (ACM Great Lakes Symposium on VLSI, 2021)

Re2PIM: A Reconfigurable ReRAM-Based PIM Design for Variable-Sized Vector-Matrix Multiplication. - Yilong Zhao; Zhezhi He; Naifeng Jing; Xiaoyao Liang; Li Jiang 002 (ACM Great Lakes Symposium on VLSI, 2021)

Bit-Transformer: Transforming Bit-level Sparsity into Higher Preformance in ReRAM-based Accelerator. - Fangxin Liu; Wenbo Zhao 005; Zhezhi He; Zongwu Wang; Yilong Zhao; Yongbiao Chen; Li Jiang 002 (ICCAD, 2021)

SME: ReRAM-based Sparse-Multiplication-Engine to Squeeze-Out Bit Sparsity of Neural Network. - Fangxin Liu; Wenbo Zhao 005; Zhezhi He; Zongwu Wang; Yilong Zhao; Tao Yang 031; Jingnai Feng; Xiaoyao Liang; Li Jiang 002 (ICCD, 2021)

Improving Neural Network Efficiency via Post-training Quantization with Adaptive Floating-Point. - Fangxin Liu; Wenbo Zhao 005; Zhezhi He; Yanzhi Wang; Zongwu Wang; Changzhi Dai; Xiaoyao Liang; Li Jiang 002 (ICCV, 2021)

A Ternary Memristive Logic-in-Memory Design for Fast Data Scan. - Tianhong Shen; Yanan Sun 003; Weifeng He; Zhi Li 058; Weiyi Liu; Zhezhi He; Li Jiang 002 (ICTA, 2021)

ReRAM-Sharing: Fine-Grained Weight Sharing for ReRAM-Based Deep Neural Network Accelerator. - Zhuoran Song; Dongyue Li; Zhezhi He; Xiaoyao Liang; Li Jiang 002 (ISCAS, 2021)

PIPArch: Programmable Image Processing Architecture Using Sliding Array. - Feiyang Wu; Zhuoran Song; Jing Ke; Li Jiang 002; Naifeng Jing; Xiaoyao Liang (ISPA/BDCloud/SocialCom/SustainCom, 2021)

On Workload-Aware DRAM Failure Prediction in Large-Scale Data Centers. - Xingyi Wang; Yu Li 007; Yiquan Chen; Shiwen Wang; Yin Du; Cheng He; Yuzhong Zhang; Pinan Chen; Xin Li; Wenjun Song; Qiang Xu 001; Li Jiang 002 (VTS, 2021)

SME: ReRAM-based Sparse-Multiplication-Engine to Squeeze-Out Bit Sparsity of Neural Network. - Fangxin Liu; Wenbo Zhao 005; Yilong Zhao; Zongwu Wang; Tao Yang 031; Zhezhi He; Naifeng Jing; Xiaoyao Liang; Li Jiang 002 (CoRR, 2021)

Skimming and Scanning for Untrimmed Video Action Recognition. - Yunyan Hong; Ailing Zeng; Min Li 019; Cewu Lu; Li Jiang 002; Qiang Xu 001 (CoRR, 2021)

Unary Coding and Variation-Aware Optimal Mapping Scheme for Reliable ReRAM-Based Neuromorphic Computing. - Yanan Sun 003; Chang Ma; Zhi Li 058; Yilong Zhao; Jiachen Jiang; Weikang Qian; Rui Yang; Zhezhi He; Li Jiang 002 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

ITT-RNA: Imperfection Tolerable Training for RRAM-Crossbar-Based Deep Neural-Network Accelerator. - Zhuoran Song; Yanan Sun 003; Lerong Chen; Tianjian Li; Naifeng Jing; Xiaoyao Liang; Li Jiang 002 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

BISWSRBS: A Winograd-based CNN Accelerator with a Fine-grained Regular Sparsity Pattern and Mixed Precision Quantization. - Tao Yang 031; Zhezhi He; Tengchuan Kou; Qingzheng Li; Qi Han; Haibao Yu; Fangxin Liu; Yun Liang 001; Li Jiang 002 (ACM Trans. Reconfigurable Technol. Syst., 2021)

DyTAN: Dynamic Ternary Content Addressable Memory Using Nanoelectromechanical Relays. - Hongtao Zhong; Shengjie Cao; Li Jiang 002; Xia An; Vijaykrishnan Narayanan; Yongpan Liu; Huazhong Yang; Xueqing Li 002 (IEEE Trans. Very Large Scale Integr. Syst., 2021)

SpikeConverter: An Efficient Conversion Framework Zipping the Gap between Artificial Neural Networks and Spiking Neural Networks. - Fangxin Liu; Wenbo Zhao 005; Yongbiao Chen; Zongwu Wang; Li Jiang 002 (AAAI, 2022)

HAWIS: Hardware-Aware Automated WIdth Search for Accurate, Energy-Efficient and Robust Binary Neural Network on ReRAM Dot-Product Engine. - Qidong Tang; Zhezhi He; Fangxin Liu; Zongwu Wang; Yiyuan Zhou; Yinghuan Zhang; Li Jiang 002 (ASP-DAC, 2022)

PIM-DH: ReRAM-based processing-in-memory architecture for deep hashing acceleration. - Fangxin Liu; Wenbo Zhao 005; Yongbiao Chen; Zongwu Wang; Zhezhi He; Rui Yang; Qidong Tang; Tao Yang 031; Cheng Zhuo; Li Jiang 002 (DAC, 2022)

EBSP: evolving bit sparsity patterns for hardware-friendly inference of quantized deep neural networks. - Fangxin Liu; Wenbo Zhao 005; Zongwu Wang; Yongbiao Chen; Zhezhi He; Naifeng Jing; Xiaoyao Liang; Li Jiang 002 (DAC, 2022)

SATO: spiking neural network acceleration via temporal-oriented dataflow and architecture. - Fangxin Liu; Wenbo Zhao 005; Zongwu Wang; Yongbiao Chen; Tao Yang 031; Zhezhi He; Xiaokang Yang 001; Li Jiang 002 (DAC, 2022)

Self-Terminating Write of Multi-Level Cell ReRAM for Efficient Neuromorphic Computing. - Zongwu Wang; Zhezhi He; Rui Yang; Shiquan Fan; Jie Lin 004; Fangxin Liu; Yueyang Jia; Chenxi Yuan; Qidong Tang; Li Jiang 002 (DATE, 2022)

DTQAtten: Leveraging Dynamic Token-based Quantization for Efficient Attention Architecture. - Tao Yang 031; Dongyue Li; Zhuoran Song; Yilong Zhao; Fangxin Liu; Zongwu Wang; Zhezhi He; Li Jiang 002 (DATE, 2022)

N3H-Core: Neuron-designed Neural Network Accelerator via FPGA-based Heterogeneous Computing Cores. - Yu Gong; Zhihan Xu; Zhezhi He; Weifeng Zhang 003; Xiaobing Tu; Xiaoyao Liang; Li Jiang 002 (FPGA, 2022)

Randomize and Match: Exploiting Irregular Sparsity for Energy Efficient Processing in SNNs. - Fangxin Liu; Zongwu Wang; Wenbo Zhao 005; Yongbiao Chen; Tao Yang 031; Xiaokang Yang 001; Li Jiang 002 (ICCD, 2022)

Cross-layer Designs against Non-ideal Effects in ReRAM-based Processing-in-Memory System. - Chen Nie; Zongwu Wang; Qidong Tang; Chenyang Lv; Li Jiang 002; Zhezhi He (ISQED, 2022)

L3E-HD: A Framework Enabling Efficient Ensemble in High-Dimensional Space for Language Tasks. - Fangxin Liu; Haomin Li 002; Xiaokang Yang 001; Li Jiang 002 (SIGIR, 2022)

CP-ViT: Cascade Vision Transformer Pruning via Progressive Sparsity Prediction. - Zhuoran Song; Yihong Xu; Zhezhi He; Li Jiang 002; Naifeng Jing; Xiaoyao Liang (CoRR, 2022)

DNN Training Acceleration via Exploring GPGPU Friendly Sparsity. - Zhuoran Song; Yihong Xu; Han Li; Naifeng Jing; Xiaoyao Liang; Li Jiang 002 (CoRR, 2022)

RePAST: A ReRAM-based PIM Accelerator for Second-order Training of DNN. - Yilong Zhao; Li Jiang 002; Mingyu Gao 001; Naifeng Jing; Chengyang Gu; Qidong Tang; Fangxin Liu; Tao Yang 031; Xiaoyao Liang (CoRR, 2022)

Neural-PIM: Efficient Processing-In-Memory With Neural Approximation of Peripherals. - Weidong Cao 001; Yilong Zhao; Adith Boloor; Yinhe Han 001; Xuan Zhang 001; Li Jiang 002 (IEEE Trans. Computers, 2022)

IVQ: In-Memory Acceleration of DNN Inference Exploiting Varied Quantization. - Fangxin Liu; Wenbo Zhao 005; Zongwu Wang; Yilong Zhao; Tao Yang 031; Yiran Chen 001; Li Jiang 002 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

HyperAttack: An Efficient Attack Framework for HyperDimensional Computing. - Fangxin Liu; Haomin Li 002; Yongbiao Chen; Tao Yang 031; Li Jiang 002 (DAC, 2023)

SpMMPlu: A Compiler Plug-in with Sparse IR for Efficient Sparse Matrix Multiplication. - Tao Yang 031; Yiyuan Zhou; Qidong Tang; Feng Xu; Hui Ma; Jieru Zhao; Li Jiang 002 (DAC, 2023)

SIMSnn: A Weight-Agnostic ReRAM-based Search-In-Memory Engine for SNN Acceleration. - Fangxin Liu; Wenbo Zhao 005; Zongwu Wang; Xiaokang Yang 001; Li Jiang 002 (DATE, 2023)

PRADA: Point Cloud Recognition Acceleration via Dynamic Approximation. - Zhuoran Song; Heng Lu; Gang Li 015; Li Jiang 002; Naifeng Jing; Xiaoyao Liang (DATE, 2023)

PIMPR: PIM-based Personalized Recommendation with Heterogeneous Memory Hierarchy. - Tao Yang 031; Hui Ma; Yilong Zhao; Fangxin Liu; Zhezhi He; Xiaoli Sun; Li Jiang 002 (DATE, 2023)

HyperNode: An Efficient Node Classification Framework Using HyperDimensional Computing. - Haomin Li 002; Fangxin Liu; Yichi Chen; Li Jiang 002 (ICCAD, 2023)

PSQ: An Automatic Search Framework for Data-Free Quantization on PIM-based Architecture. - Fangxin Liu; Ning Yang; Li Jiang 002 (ICCD, 2023)

HyAcc: A Hybrid CAM-MAC RRAM-based Accelerator for Recommendation Model. - Xuan Zhang 001; Zhuoran Song; Xing Li; Zhezhi He; Li Jiang 002; Naifeng Jing; Xiaoyao Liang (ICCD, 2023)

ASDR: An Application-Specific Deadlock-Free Routing for Chiplet-Based Systems. - Yaoyao Ye; Zixuan Liu; Jungan Liu; Li Jiang 002 (NoCArc@MICRO, 2023)

SoBS-X: Squeeze-Out Bit Sparsity for ReRAM-Crossbar-Based Neural Network Accelerator. - Fangxin Liu; Zongwu Wang; Yongbiao Chen; Zhezhi He; Tao Yang 031; Xiaoyao Liang; Li Jiang 002 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

PASGCN: An ReRAM-Based PIM Design for GCN With Adaptively Sparsified Graphs. - Tao Yang 031; Dongyue Li; Fei Ma; Zhuoran Song; Yilong Zhao; Jiaxi Zhang 001; Fangxin Liu; Li Jiang 002 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

DTATrans: Leveraging Dynamic Token-Based Quantization With Accuracy Compensation Mechanism for Efficient Transformer Architecture. - Tao Yang 031; Fei Ma; Xiaoling Li; Fangxin Liu; Yilong Zhao; Zhezhi He; Li Jiang 002 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

Real-Time Video Recognition via Decoder-Assisted Neural Network Acceleration Framework. - Zhuoran Song; Heng Lu; Li Jiang 002; Naifeng Jing; Xiaoyao Liang (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

TSTC: Enabling Efficient Training via Structured Sparse Tensor Compilation. - Shiyuan Huang; Fangxin Liu; Tian Li; Zongwu Wang; Haomin Li 002; Li Jiang 002 (ASPDAC, 2024)

HyperFeel: An Efficient Federated Learning Framework Using Hyperdimensional Computing. - Haomin Li 002; Fangxin Liu; Yichi Chen; Li Jiang 002 (ASPDAC, 2024)

PAAP-HD: PIM-Assisted Approximation for Efficient Hyper-Dimensional Computing. - Fangxin Liu; Haomin Li 002; Ning Yang; Yichi Chen; Zongwu Wang; Tao Yang 031; Li Jiang 002 (ASPDAC, 2024)

TEAS: Exploiting Spiking Activity for Temporal-wise Adaptive Spiking Neural Networks. - Fangxin Liu; Haomin Li 002; Ning Yang; Zongwu Wang; Tao Yang 031; Li Jiang 002 (ASPDAC, 2024)

INSPIRE: Accelerating Deep Neural Networks via Hardware-friendly Index-Pair Encoding. - Fangxin Liu; Ning Yang; Zhiyan Song; Zongwu Wang; Haomin Li 002; Shiyuan Huang; Zhuoran Song; Songwen Pei; Li Jiang 002 (DAC, 2024)

EOS: An Energy-Oriented Attack Framework for Spiking Neural Networks. - Ning Yang; Fangxin Liu; Zongwu Wang; Haomin Li 002; Zhuoran Song; Songwen Pei; Li Jiang 002 (DAC, 2024)

RTSA: An RRAM-TCAM based In-Memory-Search Accelerator for Sub-100 µs Collision Detection. - Jiahao Sun; Fangxin Liu; Yijian Zhang; Li Jiang 002; Rui Yang (DATE, 2024)

Watt: A Write-Optimized RRAM-Based Accelerator for Attention. - Xuan Zhang 001; Zhuoran Song; Xing Li; Zhezhi He; Naifeng Jing; Li Jiang 002; Xiaoyao Liang (Euro-Par (2), 2024)

SPARK: Scalable and Precision-Aware Acceleration of Neural Networks via Efficient Encoding. - Fangxin Liu; Ning Yang; Haomin Li 002; Zongwu Wang; Zhuoran Song; Songwen Pei; Li Jiang 002 (HPCA, 2024)

HOLES: Boosting Large Language Models Efficiency with Hardware-Friendly Lossless Encoding. - Fangxin Liu; Ning Yang; Zhiyan Song; Zongwu Wang; Li Jiang 002 (ICCD, 2024)

PS4: A Low Power SNN Accelerator with Spike Speculative Scheme. - Zongwu Wang; Fangxin Liu; Xin Tang; Li Jiang 002 (ICCD, 2024)

T-BUS: Taming Bipartite Unstructured Sparsity for Energy-Efficient DNN Acceleration. - Ning Yang; Fangxin Liu; Zongwu Wang; Zhiyan Song; Tao Yang 031; Li Jiang 002 (ICCD, 2024)

Early: An Importance-Aware Early Firing and Exit for SNN Acceleration. - Xuan Zhang 001; Zhuoran Song; Peng Zhou; Xing Li; Xueyuan Liu 001; Xiaolong Lin; Zhezhi He; Li Jiang 002; Naifeng Jing; Xiaoyao Liang (ICCD, 2024)

Ninja: A Hardware Assisted System for Accelerating Nested Address Translation. - Longyu Zhao; Zongwu Wang; Fangxin Liu; Li Jiang 002 (ICCD, 2024)

NDPBridge: Enabling Cross-Bank Coordination in Near-DRAM-Bank Processing Architectures. - Boyu Tian; Yiwei Li 004; Li Jiang 002; Shuangyu Cai; Mingyu Gao 001 (ISCA, 2024)

UM-PIM: DRAM-based PIM with Uniform & Shared Memory Space. - Yilong Zhao; Mingyu Gao 001; Fangxin Liu; Yiwei Hu; Zongwu Wang; Han Lin; Jin Li 002; He Xian; Hanlin Dong; Tao Yang 031; Naifeng Jing; Xiaoyao Liang; et al. (ISCA, 2024)

LowPASS: A Low power PIM-based accelerator with Speculative Scheme for SNNs. - Fangxin Liu; Shiyuan Huang; Longyu Zhao; Li Jiang 002; Zongwu Wang (ISLPED, 2024)

SRender: Boosting Neural Radiance Field Efficiency via Sensitivity-Aware Dynamic Precision Rendering. - Zhuoran Song; Houshu He; Fangxin Liu; Yifan Hao 001; Xinkai Song; Li Jiang 002; Xiaoyao Liang (MICRO, 2024)

COMPASS: SRAM-Based Computing-in-Memory SNN Accelerator with Adaptive Spike Speculation. - Zongwu Wang; Fangxin Liu; Ning Yang; Shiyuan Huang; Haomin Li 002; Li Jiang 002 (MICRO, 2024)

TokenRing: An Efficient Parallelism Framework for Infinite-Context LLMs via Bidirectional Communication. - Zongwu Wang; Fangxin Liu; Mingshuai Li; Li Jiang 002 (CoRR, 2024)

ERA-BS: Boosting the Efficiency of ReRAM-Based PIM Accelerator With Fine-Grained Bit-Level Sparsity. - Fangxin Liu; Wenbo Zhao 005; Zongwu Wang; Yongbiao Chen; Xiaoyao Liang; Li Jiang 002 (IEEE Trans. Computers, 2024)

VSPIM: SRAM Processing-in-Memory DNN Acceleration via Vector-Scalar Operations. - Chen Nie; Chenyu Tang; Jie Lin 004; Huan Hu; Chenyang Lv; Ting Cao; Weifeng Zhang 003; Li Jiang 002; Xiaoyao Liang; Weikang Qian; Yanan Sun 003; Zhezhi He (IEEE Trans. Computers, 2024)

Environmental Condition Aware Super-Resolution Acceleration Framework in Server-Client Hierarchies. - Zhuoran Song; Zhongkai Yu; Xinkai Song; Yifan Hao 001; Li Jiang 002; Naifeng Jing; Xiaoyao Liang (ACM Trans. Archit. Code Optim., 2024)

NeuronQuant: Accurate and Efficient Post-Training Quantization for Spiking Neural Networks. - Haomin Li 002; Fangxin Liu; Zewen Sun; Zongwu Wang; Shiyuan Huang; Ning Yang; Li Jiang 002 (ASP-DAC, 2025)

Exploiting Differential-Based Data Encoding for Enhanced Query Efficiency. - Fangxin Liu; Zongwu Wang; Peng Xu; Shiyuan Huang; Li Jiang 002 (ASP-DAC, 2025)

TAIL: Exploiting Temporal Asynchronous Execution for Efficient Spiking Neural Networks with Inter-Layer Parallelism. - Haomin Li 002; Fangxin Liu; Zongwu Wang; Dongxu Lyu; Shiyuan Huang; Ning Yang; Qi Sun; Zhuoran Song; Li Jiang 002 (DATE, 2025)

HyperDyn: Dynamic Dimensional Masking for Efficient Hyper-Dimensional Computing. - Fangxin Liu; Haomin Li 002; Zongwu Wang; Dongxu Lyu; Li Jiang 002 (DATE, 2025)

OPS: Outlier-Aware Precision-Slice Framework for LLM Acceleration. - Fangxin Liu; Ning Yang; Zongwu Wang; Xuanpeng Zhu; Haidong Yao; Xiankui Xiong; Qi Sun; Li Jiang 002 (DATE, 2025)

EVASION: Efficient KV CAche CompreSsion vIa PrOduct QuaNtization. - Zongwu Wang; Fangxin Liu; Peng Xu; Qingxiao Sun; Junping Zhao; Li Jiang 002 (DATE, 2025)

GSArch: Breaking Memory Barriers in 3D Gaussian Splatting Training via Architectural Support. - Houshu He; Gang Li 015; Fangxin Liu; Li Jiang 002; Xiaoyao Liang; Zhuoran Song (HPCA, 2025)

CROSS: Compiler-Driven Optimization of Sparse DNNs Using Sparse/Dense Computation Kernels. - Fangxin Liu; Shiyuan Huang; Ning Yang; Zongwu Wang; Haomin Li 002; Li Jiang 002 (HPCA, 2025)

FATE: Boosting the Performance of Hyper-Dimensional Computing Intelligence with Flexible Numerical DAta TypE. - Haomin Li 002; Fangxin Liu; Yichi Chen; Zongwu Wang; Shiyuan Huang; Ning Yang; Dongxu Lyu; Li Jiang 002 (ISCA, 2025)

STCO: Enhancing Training Efficiency via Structured Sparse Tensor Compilation Optimization. - Shiyuan Huang; Fangxin Liu; Tian Li; Zongwu Wang; Ning Yang; Haomin Li 002; Li Jiang 002 (ACM Trans. Design Autom. Electr. Syst., 2025)

SpMMPlu-Pro: An Enhanced Compiler Plug-In for Efficient SpMM and Sparsity Propagation Algorithm. - Shiyuan Huang; Fangxin Liu; Tao Yang 031; Zongwu Wang; Ning Yang; Li Jiang 002 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)

ALLMod: Exploring Area-Efficiency of LUT-based Large Number Modular Reduction via Hybrid Workloads. - Fangxin Liu; Haomin Li 002; Zongwu Wang; Bo Zhang; Mingzhe Zhang; Shoumeng Yan; Li Jiang 002; Haibing Guan (CoRR, 2025)

GCNTrain+: A Versatile and Efficient Accelerator for Graph Convolutional Neural Network Training. - Zhuoran Song; Jiabei Long; Li Jiang 002; Naifeng Jing; Xiaoyao Liang (ACM Trans. Archit. Code Optim., 2025)

MILLION: Mastering Long-Context LLM Inference Via Outlier-Immunized KV Product Quantization. - Zongwu Wang; Peng Xu; Fangxin Liu; Yiwei Hu; Qingxiao Sun; Gezi Li; Cheng Li; Xuan Wang; Li Jiang 002; Haibing Guan (CoRR, 2025)

DASH: Input-Aware Dynamic Layer Skipping for Efficient LLM Inference with Markov Decision Policies. - Ning Yang; Fangxin Liu; Junjie Wang; Tao Yang 031; Kang Liu 001; Haibing Guan; Li Jiang 002 (CoRR, 2025)

FlexQuant: A Flexible and Efficient Dynamic Precision Switching Framework for LLM Quantization. - Fangxin Liu; Zongwu Wang; JinHong Xia; Junping Zhao; Jian Liu; Haibing Guan; Li Jiang 002 (CoRR, 2025)

LCD: Advancing Extreme Low-Bit Clustering for Large Language Models via Knowledge Distillation. - Fangxin Liu; Ning Yang; Junping Zhao; Tao Yang 031; Haibing Guan; Li Jiang 002 (CoRR, 2025)

RTSA: A Run-Through Sparse Attention Framework for Video Transformer. - Xuhang Wang; Zhuoran Song; Chunyu Qi; Fangxin Liu; Naifeng Jing; Li Jiang 002; Xiaoyao Liang (IEEE Trans. Computers, 2025)

ASDR: Exploiting Adaptive Sampling and Data Reuse for CIM-based Instant Neural Rendering. - Fangxin Liu; Haomin Li 002; Bowen Zhu; Zongwu Wang; Zhuoran Song; Habing Guan; Li Jiang 002 (CoRR, 2025)

PUSHtap: PIM-based In-Memory HTAP with Unified Data Storage Format. - Yilong Zhao; Mingyu Gao 001; Huanchen Zhang; Fangxin Liu; Gongye Chen; He Xian; Haibing Guan; Li Jiang 002 (CoRR, 2025)