A 32-Gb/s 0.46-pJ/bit PAM4 CDR Using a Quarter-Rate Linear Phase Detector and a Low-Power Multiphase Clock Generator. - Zhao Zhang 004; Guang Zhu; Can Wang 009; Li Wang 083; C. Patrick Yue (A-SSCC, 2019)

A Dual-Resonance Matching Circuit for Magnetic Resonance Wireless Power Transfer Systems. - Li Wang 083; Caroline Tjoe; Bo Xu; Patrick Yue (GCCE, 2019)

Design of a Real-Time Visible Laser Light Communication System with Basedband in FPGA for High Definition video Transmission. - Jian Kang; Li Wang 083; C. Patrick Yue (GCCE, 2019)

Smart Table Applications Based on Magnetic Resonance Wireless Power Transfer. - Li Wang 083; Caroline Tjoe; Jian Kang; Patrick Yue (GCCE, 2019)

A Real-Time RGB PAM-4 Visible Light Communication System Based on a Transceiver Design with Pre- and Post-equalizations. - Jian Kang; Xuanzheng Wang; Li Wang 083; Can Wang 009; C. Patrick Yue (MLICOM, 2020)

An RGB-LED Driver with Feed-Forward Equalization Used for PAM-4 Visible Light Communication. - Bo Xu; Li Wang 083; Jian Kang; Cong Qiu; C. Patrick Yue (MLICOM, 2020)

A 32-Gb/s 0.46-pJ/bit PAM4 CDR Using a Quarter-Rate Linear Phase Detector and a Self-Biased PLL-Based Multiphase Clock Generator. - Zhao Zhang 004; Guang Zhu; Can Wang 009; Li Wang 083; C. Patrick Yue (IEEE J. Solid State Circuits, 2020)

A Low-Power PAM4 Receiver With an Adaptive Variable-Gain Rectifier-Based Decoder. - Quan Pan 002; Li Wang 083; Xiongshi Luo; C. Patrick Yue (IEEE Trans. Very Large Scale Integr. Syst., 2020)

A 60-Gb/s 1.2-pJ/bit 1/4-Rate PAM4 Receiver with a -8-dB JTRAN 40-MHz 0.2-UIPP JTOL Clock and Data Recovery. - Li Wang 083; Zhao Zhang 004; C. Patrick Yue (VLSI Circuits, 2021)

A W-Band Single-Antenna FMCW Radar Transceiver With Adaptive Leakage Cancellation. - Milad Kalantari; Li Wang 083; Hossein Shirinabadi; Ali Fotowat-Ahmady; C. Patrick Yue (IEEE J. Solid State Circuits, 2021)

A 52-Gb/s Sub-1-pJ/bit PAM4 Receiver in 40-nm CMOS for Low-Power Interconnects. - Can Wang 009; Li Wang 083; Zhao Zhang 004; Milad Kalantari Mahmoudabadi; Weimin Shi; C. Patrick Yue (IEEE Open J. Circuits Syst., 2021)

Sensing and Cancellation Circuits for Mitigating EMI-Related Common Mode Noise in High-Speed PAM-4 Transmitter. - Rehan Azmat; Li Wang 083; Khawaja Qasim Maqbool; Can Wang 009; C. Patrick Yue (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

A 2.05-pJ/b 56-Gb/s PAM-4 VCSEL Transmitter with Piecewise Nonlinearity Compensation and Asymmetric Equalization in 40-nm CMOS. - Fuzhan Chen; Chongyun Zhang; Li Wang 083; Quan Pan 002; C. Patrick Yue (ESSCIRC, 2023)

A 48-Gb/s Half-Rate PAM4 Optical Receiver with 0.27-pJ/bit TIA Efficiency, 1.28-pJ/bit RX Efficiency, and 0.06-mm2 area in 28-nm CMOS. - Chongyun Zhang; Li Wang 083; Zilu Liu; Fuzhan Chen; Quan Pan 002; Xianbo Li; C. Patrick Yue (VLSI Technology and Circuits, 2024)

A 60-Gb/s 1.2-pJ/bit 1/4-Rate PAM-4 Receiver With a Jitter Compensation CDR. - Li Wang 083; Zhao Zhang 004; Can Wang 009; Rehan Azmat; Weimin Shi; C. Patrick Yue (IEEE J. Solid State Circuits, 2024)