A test processor chip implementing multiple seed, multiple polynomial linear feedback shift register. - Zahari M. Darus; Iftekhar Ahmed 003; Liakot Ali (Asian Test Symposium, 1997)

Development of an LFSR based test pattern generator for functional logic testing. - Syed Zahidul Islam; Mohd. Alauddin Mohd. Ali; Liakot Ali (ICECS, 2003)

Design of a micro-UART for SoC application. - Liakot Ali; Roslina Mohd Sidek; Ishak Aris; Mohd. Alauddin Mohd. Ali; Bambang Sunaryo Suparjo (Comput. Electr. Eng., 2004)

Challenges and directions for testing IC. - Liakot Ali; Roslina Mohd Sidek; Ishak Aris; Bambang Sunaryo Suparjo; Mohd. Alauddin Mohd. Ali (Integr., 2004)

Rough Set Based Data Mining Strategy for Analyzing Distance Protective Relay Operations. - Mohammad Lutfi Othman; Ishak Aris; Mahmod Senan Abdullah; Liakot Ali; Mohammad Ridzal Othman (IKE, 2009)

Design of a Testchip for Low Cost IC Testing. - Liakot Ali; Roslina Mohd Sidek; Ishak Aris; Mohd. Alauddin Mohd. Ali (Intell. Autom. Soft Comput., 2009)

Design of an ultra high speed AES processor for next generation IT security. - Liakot Ali; Ishak Aris; Fakir Sharif Hossain; Niranjan Roy (Comput. Electr. Eng., 2011)

Unsupervised Recycled FPGA Detection Using Symmetry Analysis. - Tanvir Ahmad Tarique; Foisal Ahmed; Maksim Jenihhin; Liakot Ali (CoRR, 2023)