The Design of the CMOS Current-Mode General-Purpose Analog Processor. - Liang-Hung Lu; Chung-Yu Wu (ISCAS, 1994)

A 4-91 GHz distributed amplifier in a standard 0.12 μm SOI CMOS microprocessor technology. - Jean-Olivier Plouchart; Jonghae Kim; Noah Zamdmer; Liang-Hung Lu; Melanie Sherony; Yue Tan; Robert A. Groves; Robert Trzcinski; Mohamed Talbi; Asit Ray; Lawrence F. Wagner (CICC, 2003)

A 4-91-GHz traveling-wave amplifier in a standard 0.12-μm SOI CMOS microprocessor technology. - Jean-Olivier Plouchart; Jonghae Kim; Noah Zamdmer; Liang-Hung Lu; Melanie Sherony; Yue Tan; Robert A. Groves; Robert Trzcinski; Mohamed Talbi; Asit Ray; Lawrence F. Wagner (IEEE J. Solid State Circuits, 2004)

A 45.6-GHz matrix distributed amplifier in 0.18-nm CMOS. - Tai-Yuan Chen; Jun-Chau Chien; Liang-Hung Lu (CICC, 2005)

Integrated CMOS Power Sensors for RF BIST Applications. - Hsieh-Hung Hsieh; Liang-Hung Lu (VTS, 2006)

A BIST Technique for RF Voltage-Controlled Oscillators. - Hsieh-Hung Hsieh; Yen-Chih Huang; Liang-Hung Lu; Guo-Wei Huang (ATS, 2007)

40Gb/s High-Gain Distributed Amplifiers with Cascaded Gain Stages in 0.18μm CMOS. - Jun-Chau Chien; Liang-Hung Lu (ISSCC, 2007)

40GHz Wide-Locking-Range Regenerative Frequency Divider and Low-Phase-Noise Balanced VCO in 0.18μm CMOS. - Jun-Chau Chien; Liang-Hung Lu (ISSCC, 2007)

A Low-Noise Amplifier with Integrated Current and Power Sensors for RF BIST Applications. - Yen-Chih Huang; Hsieh-Hung Hsieh; Liang-Hung Lu (VTS, 2007)

Analysis and Design of Wideband Injection-Locked Ring Oscillators With Multiple-Input Injection. - Jun-Chau Chien; Liang-Hung Lu (IEEE J. Solid State Circuits, 2007)

Design of Wide-Tuning-Range Millimeter-Wave CMOS VCO With a Standing-Wave Architecture. - Jun-Chau Chien; Liang-Hung Lu (IEEE J. Solid State Circuits, 2007)

40-Gb/s High-Gain Distributed Amplifiers With Cascaded Gain Stages in 0.18-µm CMOS. - Jun-Chau Chien; Liang-Hung Lu (IEEE J. Solid State Circuits, 2007)

A 10-Gb/s Inductorless CMOS Limiting Amplifier With Third-Order Interleaving Active Feedback. - Huei-Yan Huang; Jun-Chau Chien; Liang-Hung Lu (IEEE J. Solid State Circuits, 2007)

A V-Band CMOS VCO With an Admittance-Transforming Cross-Coupled Pair. - Hsieh-Hung Hsieh; Liang-Hung Lu (IEEE J. Solid State Circuits, 2009)

An Amorphous-Silicon Operational Amplifier and Its Application to a 4-Bit Digital-to-Analog Converter. - Yi-Chuan Tarn; Po-Chih Ku; Hsieh-Hung Hsieh; Liang-Hung Lu (IEEE J. Solid State Circuits, 2010)

A Low-Power Quadrature VCO and Its Application to a 0.6-V 2.4-GHz PLL. - Chung-Ting Lu; Hsieh-Hung Hsieh; Liang-Hung Lu (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)

Experimental 5-GHz RF Frontends for Ultra-Low-Voltage and Ultra-Low-Power Operations. - Hsieh-Hung Hsieh; Huan-Sheng Chen; Ping-Hsi Hung; Liang-Hung Lu (IEEE Trans. Very Large Scale Integr. Syst., 2011)

A fully electrical startup batteryless boost converter with 50mV input voltage for thermoelectric energy harvesting. - Hao-Yen Tang; Po-Shuan Weng; Po-Chih Ku; Liang-Hung Lu (VLSIC, 2012)

A wideband programmable-gain amplifier for 60GHz applications in 65nm CMOS. - Yi-Keng Hsieh; Hsieh-Hung Hsieh; Liang-Hung Lu (VLSI-DAT, 2013)

50 mV-Input Batteryless Boost Converter for Thermal Energy Harvesting. - Po-Shuan Weng; Hao-Yen Tang; Po-Chih Ku; Liang-Hung Lu (IEEE J. Solid State Circuits, 2013)

A built-in gain calibration technique for RF low-noise amplifiers. - Ya-Ru Wu; Yi-Keng Hsieh; Po-Chih Ku; Liang-Hung Lu (VTS, 2014)

A 5.2-GHz full-integrated RF front-end by T/R switch, LNA, and PA co-design with 3.2-dB NF and +25.9-dBm output power. - Huan-Sheng Chen; Hung-Yu Tsai; Li-Xuan Chuo; Yu-Kai Tsai; Liang-Hung Lu (A-SSCC, 2015)

An Analog On-Line Gain Calibration Loop for RF Amplifiers. - Yi-Keng Hsieh; Ya-Ru Wu; Po-Chih Ku; Liang-Hung Lu (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

A 0.3-V 7.6-fJ/conv-step delta-sigma time-to-digital converter with a gated-free ring oscillator. - Chih-Kai Chang; Yu-Kai Tsai; Kai-Han Cheng; Liang-Hung Lu (NEWCAS, 2017)

A 2.4-GHz dual-mode resizing power amplifier with a constant conductance output matching. - Wei-Lun Ou; Yu-Kai Tsai; Po-Yen Tseng; Liang-Hung Lu (SoCC, 2017)

A 51.3-MHz 21.8-ppm/°C CMOS Relaxation Oscillator With Temperature Compensation. - Yu-Kai Tsai; Liang-Hung Lu (IEEE Trans. Circuits Syst. II Express Briefs, 2017)

A High-Voltage DAC-Based Transmitter for Coded Signals in High Frequency Ultrasound Imaging Applications. - Po-Chih Ku; Kuan-Yu Shih; Liang-Hung Lu (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

A Concurrent Dual-Band and Dual-Mode Frequency Synthesizer for Radar Systems. - Yu-Kai Tsai; Yi-Keng Hsieh; Hung-Yu Tsai; Huan-Sheng Chen; Liang-Hung Lu (IEEE Trans. Very Large Scale Integr. Syst., 2018)

A 40.4-dB Range, 0.73-dB Step, and 0.07-dB Error Programmable Gain Amplifier Using Gain Error Shifting Technique. - Lin-Sen Wang; Po-Chih Ku; Po-Ting Ko; Chi-Jung Chung; Liang-Hung Lu (IEEE Trans. Circuits Syst. II Express Briefs, 2019)

A 2.4-GHz Ring-VCO-Based Sub-Sampling PLL With a -70-dBc Reference Spur by Adopting a Capacitor-Multiplier-Based Sub-Sampling DLL. - Teng-Shen Yang; Huai-Yuan Hsieh; Liang-Hung Lu (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

A 28-GHz CMOS Power Amplifier With Adaptive Bias and Phase Compensation for Gain and Phase Linearity Enhancement. - Liang-Chen Tsai; Zheng-Jie Li; Liang-Hung Lu (IEEE Trans. Circuits Syst. II Express Briefs, 2025)