Liang Wu

Orcid: 0000-0003-2944-3035

Affiliations:
  • Hong Kong University of Science and Technology, Department of Electronic and Computer Engineering, Hong Kong (PhD 2012)


According to our database1, Liang Wu authored at least 19 papers between 2012 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

Online presence:

On csauthors.net:

Bibliography

2024
A 299-315-GHz Dual-Band Radiator Array With Cascaded Transmission Line-Based Feedback Network for Phase Noise Improvement.
IEEE J. Emerg. Sel. Topics Circuits Syst., March, 2024

2023
A 5-mW 30-GHz Quasi-Rotary Traveling-Wave Oscillator With Extrinsic-Q-Enhanced Transmission Line.
IEEE Trans. Circuits Syst. I Regul. Pap., October, 2023

A 53-78 GHz Complementary Push-Push Frequency Doubler With Implicit Dual Resonance for Output Power Combining.
IEEE Trans. Circuits Syst. I Regul. Pap., March, 2023

2022
Phase Shift Techniques for Improving Varactor-Less QVCO Based on Rotated-Phase-Tuning.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

2021
A 15-38 GHz Vector-Summing Phase-Shifter With 360° Phase-Shifting Range Using Improved I/Q Generator.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

A 9.8-30.1 GHz CMOS low-noise amplifier with a 3.2-dB noise figure using inductor- and transformer-based g<sub>m</sub>-boosting techniques.
Frontiers Inf. Technol. Electron. Eng., 2021

2018
E-Band Multi-Phase LC Oscillators With Rotated-Phase-Tuning Using Implicit Phase Shifters.
IEEE J. Solid State Circuits, 2018

2017
A 0.9-5.8-GHz Software-Defined Receiver RF Front-End With Transformer-Based Current-Gain Boosting and Harmonic Rejection Calibration.
IEEE Trans. Very Large Scale Integr. Syst., 2017

A 4-Element 60-GHz CMOS Phased-Array Receiver With Beamforming Calibration.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

Design and Analysis of CMOS LNAs with Transformer Feedback for Wideband Input Matching and Noise Cancellation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

A 312-GHz CMOS Injection-Locked Radiator With Chip-and-Package Distributed Antenna.
IEEE J. Solid State Circuits, 2017

A Spur-and-Phase-Noise-Filtering Technique for Inductor-Less Fractional-N Injection-Locked PLLs.
IEEE J. Solid State Circuits, 2017

2016
An inductor-less fractional-N injection-locked PLL with a spur-and-phase-noise filtering technique.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

2014
A 49-to-62 GHz Quadrature VCO With Bimodal Enhanced-Magnetic-Tuning Technique.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

2013
Analysis and Design of a 0.6 V 2.2 mW 58.5-to-72.9 GHz Divide-by-4 Injection-Locked Frequency Divider With Harmonic Boosting.
IEEE Trans. Circuits Syst. I Regul. Pap., 2013

A 4-Path 42.8-to-49.5 GHz LO Generation With Automatic Phase Tuning for 60 GHz Phased-Array Receivers.
IEEE J. Solid State Circuits, 2013

2012
A 4-path 42.8-to-49.5GHz LO generation with automatic phase tuning for 60GHz phased-array receivers.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

A 49-to-62GHz CMOS quadrature VCO with bimodal enhanced magnetic tuning.
Proceedings of the 38th European Solid-State Circuit conference, 2012

A 0.6V 2.2mW 58-to-73GHz divide-by-4 injection-locked frequency divider.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012


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