Liang Zhang

According to our database, Liang Zhang authored at least 7 papers between 2004 and 2009.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2009

A 32-Gb/s On-Chip Bus With Driver Pre-Emphasis Signaling.

Liang Zhang, John M. Wilson, Rizwan Bashirullah, Lei Luo, Jian Xu, Paul D. Franzon

IEEE Trans. Very Large Scale Integr. Syst., 2009

2007

Voltage-Mode Driver Preemphasis Technique For On-Chip Global Buses.

Liang Zhang, John M. Wilson, Rizwan Bashirullah, Lei Luo, Jian Xu, Paul D. Franzon

IEEE Trans. Very Large Scale Integr. Syst., 2007

2006

3 gb/s AC coupled chip-to-chip communication using a low swing pulse receiver.

Lei Luo, John M. Wilson, Stephen E. Mick, Jian Xu, Liang Zhang, Paul D. Franzon

IEEE J. Solid State Circuits, 2006

A 32Gb/s On-chip Bus with Driver Pre-emphasis Signaling.

Liang Zhang, John M. Wilson, Rizwan Bashirullah, Lei Luo, Jian Xu, Paul D. Franzon

Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

A 36Gb/s ACCI Multi-Channel Bus using a Fully Differential Pulse Receiver.

Lei Luo, John M. Wilson, Stephen E. Mick, Jian Xu, Liang Zhang, Evan Erickson, Paul D. Franzon

Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

2005

Driver pre-emphasis techniques for on-chip global buses.

Liang Zhang, John M. Wilson, Rizwan Bashirullah, Lei Luo, Jian Xu, Paul D. Franzon

Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005

2004

Simplified delay design guidelines for on-chip global interconnects.

Liang Zhang, Wentai Liu, Rizwan Bashirullah, John M. Wilson, Paul D. Franzon

Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004