Coding sensitive based approximation algorithm for power efficient VBS-DCT VLSI design in HEVC hardwired Intra encoder. - Liangliang Chang; Zhenyu Liu 001; Xiangyang Ji; Dongsheng Wang 002 (ICIP, 2017)

Enhance the HEVC Fast Intra CU Mode Decision Based on Convolutional Neural Network by Corner Power Estimation. - Liangliang Chang; Zhenyu Liu 001; Libo Wang; Xiaobo Li (DCC, 2018)

Defending Bit-Flip Attack through DNN Weight Reconstruction. - Jingtao Li; Adnan Siraj Rakin; Yan Xiong 002; Liangliang Chang; Zhezhi He; Deliang Fan; Chaitali Chakrabarti (DAC, 2020)

Enhancing Aspect-Based Sentiment Classification with Local Semantic Information. - Hengliang Tang; Qizheng Yin; Liangliang Chang; Huilin Qin; Fei Xue (BIC-TA (2), 2021)

Enabling Software-Defined RF Convergence with a Novel Coarse-Scale Heterogeneous Processor. - Daniel W. Bliss; Tutu Ajayi; Ali Akoglu; Ilkin Aliyev; Toygun Basaklar; Leul Belayneh; David T. Blaauw; John S. Brunhaver; Chaitali Chakrabarti; Liangliang Chang; Kuan-Yu Chen 001; Ming-Hung Chen; et al. (ISCAS, 2022)

Profile-Guided Parallel Task Extraction and Execution for Domain Specific Heterogeneous SoC. - Liangliang Chang; Joshua Mack; Benjamin R. Willis; Xing Chen 004; John S. Brunhaver; Ali Akoglu; Chaitali Chakrabarti (ISPA/BDCloud/SocialCom/SustainCom, 2022)

Impact of Decision Feedback on Networked Evolutionary Game with Delays in Control Channel. - Liangliang Chang; Zhipeng Zhang; Chengyi Xia (Dyn. Games Appl., 2023)

BatchSim: Parallel RTL Simulation Using Inter-Cycle Batching and Task Graph Parallelism. - Jie Tong; Liangliang Chang; Umit Yusuf Ogras; Tsung-Wei Huang (ISVLSI, 2024)

Coarse-Grained Task Parallelization by Dynamic Profiling for Heterogeneous SoC-Based Embedded System. - Liangliang Chang; Serhan Gener; Joshua Mack; Hasan Umut Suluhan; Ali Akoglu; Chaitali Chakrabarti (ACM Trans. Embed. Comput. Syst., 2025)