SMEM++: A Pipelined and Time-Multiplexed SMEM Seeding Accelerator for DNA Sequencing. - Jason Cong; Licheng Guo; Po-Tsang Huang; Peng Wei 004; Tianhe Yu (FCCM, 2018)

SMEM++: A Pipelined and Time-Multiplexed SMEM Seeding Accelerator for Genome Sequencing. - Jason Cong; Licheng Guo; Po-Tsang Huang; Peng Wei 004; Tianhe Yu (FPL, 2018)

Hardware Acceleration of Long Read Pairwise Overlapping in Genome Sequencing: A Race Between FPGA and GPU. - Licheng Guo; Jason Lau; Zhenyuan Ruan; Peng Wei 004; Jason Cong (FCCM, 2019)

Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency. - Licheng Guo; Jason Lau; Yuze Chi; Jie Wang 022; Cody Hao Yu; Zhe Chen; Zhiru Zhang; Jason Cong (DAC, 2020)

When HLS Meets FPGA HBM: Benchmarking and Bandwidth Optimization. - Young-kyu Choi; Yuze Chi; Jie Wang 022; Licheng Guo; Jason Cong (CoRR, 2020)

Extending High-Level Synthesis for Task-Parallel Programs. - Yuze Chi; Licheng Guo; Jason Lau; Young-kyu Choi; Jie Wang 022; Jason Cong (FCCM, 2021)

FANS: FPGA-Accelerated Near-Storage Sorting. - Weikang Qiao; Jihun Oh; Licheng Guo; Mau-Chung Frank Chang; Jason Cong (FCCM, 2021)

AutoSA: A Polyhedral Compiler for High-Performance Systolic Arrays on FPGA. - Jie Wang 022; Licheng Guo; Jason Cong (FPGA, 2021)

Extending High-Level Synthesis for Task-Parallel Programs. - Yuze Chi; Licheng Guo; Young-kyu Choi; Jie Wang 022; Jason Cong (FPGA, 2021)

AutoBridge: Coupling Coarse-Grained Floorplanning and Pipelining for High-Frequency HLS Design on Multi-Die FPGAs. - Licheng Guo; Yuze Chi; Jie Wang 022; Jason Lau; Weikang Qiao; Ecenur Ustun; Zhiru Zhang; Jason Cong (FPGA, 2021)

Serpens: a high bandwidth memory based accelerator for general-purpose sparse matrix-vector multiplication. - Linghao Song; Yuze Chi; Licheng Guo; Jason Cong (DAC, 2022)

Accelerating SSSP for Power-Law Graphs. - Yuze Chi; Licheng Guo; Jason Cong (FPGA, 2022)

RapidStream: Parallel Physical Implementation of FPGA HLS Designs. - Licheng Guo; Pongstorn Maidee; Yun Zhou; Chris Lavin; Jie Wang 022; Yuze Chi; Weikang Qiao; Alireza Kaviani; Zhiru Zhang; Jason Cong (FPGA, 2022)

OverGen: Improving FPGA Usability through Domain-specific Overlay Generation. - Sihao Liu; Jian Weng 002; Dylan Kupsh; Atefeh Sohrabizadeh; Zhengrong Wang; Licheng Guo; Jiuyang Liu; Maxim Zhulin; Rishabh Mani; Lucheng Zhang; Jason Cong; Tony Nowatzki (MICRO, 2022)

Co-optimizing High-Level Synthesis and Physical Design for Rapid Timing Closure of Large-Scale FPGA Designs - Licheng Guo (2022)

PASTA: Programming and Automation Support for Scalable Task-Parallel HLS Programs on Modern Multi-Die FPGAs. - Moazin Khatti; Xingyu Tian; Yuze Chi; Licheng Guo; Jason Cong; Zhenman Fang (FCCM, 2023)

Callipepla: Stream Centric Instruction Set and Mixed Precision for Accelerating Conjugate Gradient Solver. - Linghao Song; Licheng Guo; Suhail Basalama; Yuze Chi; Robert F. Lucas; Jason Cong (FPGA, 2023)

TopSort: A High-Performance Two-Phase Sorting Accelerator Optimized on HBM-Based FPGAs. - Weikang Qiao; Licheng Guo; Zhenman Fang; Mau-Chung Frank Chang; Jason Cong (IEEE Trans. Emerg. Top. Comput., 2023)

FlexCNN: An End-to-end Framework for Composing CNN Accelerators on FPGA. - Suhail Basalama; Atefeh Sohrabizadeh; Jie Wang 022; Licheng Guo; Jason Cong (ACM Trans. Reconfigurable Technol. Syst., 2023)

SASA: A Scalable and Automatic Stencil Acceleration Framework for Optimized Hybrid Spatial and Temporal Parallelism on HBM-based FPGAs. - Xingyu Tian; Zhifan Ye; Alec Lu; Licheng Guo; Yuze Chi; Zhenman Fang (ACM Trans. Reconfigurable Technol. Syst., 2023)

TAPA: A Scalable Task-parallel Dataflow Programming Framework for Modern FPGAs with Co-optimization of HLS and Physical Design. - Licheng Guo; Yuze Chi; Jason Lau; Linghao Song; Xingyu Tian; Moazin Khatti; Weikang Qiao; Jie Wang 022; Ecenur Ustun; Zhenman Fang; Zhiru Zhang; Jason Cong (ACM Trans. Reconfigurable Technol. Syst., 2023)

RapidStream 2.0: Automated Parallel Implementation of Latency-Insensitive FPGA Designs Through Partial Reconfiguration. - Licheng Guo; Pongstorn Maidee; Yun Zhou; Chris Lavin; Eddie Hung; Wuxi Li; Jason Lau; Weikang Qiao; Yuze Chi; Linghao Song; Yuanlong Xiao; Alireza Kaviani; et al. (ACM Trans. Reconfigurable Technol. Syst., 2023)

CHIP-KNNv2: A Configurable and High-Performance K-Nearest Neighbors Accelerator on HBM-based FPGAs. - Kenneth Liu; Alec Lu; Kartik Samtani; Zhenman Fang; Licheng Guo (ACM Trans. Reconfigurable Technol. Syst., 2023)

RapidStream IR: Infrastructure for FPGA High-Level Physical Synthesis. - Jason Lau; Yuanlong Xiao; Yutong Xie 011; Yuze Chi; Linghao Song; Shaojie Xiang; Michael Lo; Zhiru Zhang; Jason Cong; Licheng Guo (ICCAD, 2024)

PASTA: Programming and Automation Support for Scalable Task-Parallel HLS Programs on Modern Multi-Die FPGAs. - Moazin Khatti; Xingyu Tian; Ahmad Sedigh Baroughi; Akhil Raj Baranwal; Yuze Chi; Licheng Guo; Jason Cong; Zhenman Fang (ACM Trans. Reconfigurable Technol. Syst., 2024)

NoH: NoC Compilation in High-Level Synthesis. - Huifeng Ke; Sihao Liu; Licheng Guo; Zifan He; Linghao Song; Suhail Basalama; Yuze Chi; Tony Nowatzki; Jason Cong (FCCM, 2025)

Question Tokens Deserve More Attention: Enhancing Large Language Models without Training through Step-by-Step Reading and Question Attention Recalibration. - Feijiang Han; Licheng Guo; Hengtao Cui; Zhiyuan Lyu (CoRR, 2025)