A graph-based simplex algorithm for minimizing the layout size and the delay on timing critical paths. - Lih-Yang Wang; Yen-Tai Lai; Bin-Da Liu; Ting-Chung Chang (ICCAD, 1993)

Layout Compaction with Minimzed Delay Bound on Timing Critical Paths. - Lih-Yang Wang; Yen-Tai Lai; Bin-Da Liu; Tin-Chung Chang (ISCAS, 1993)

Performance-directed compaction for VLSI symbolic layouts. - Lih-Yang Wang; Yen-Tai Lai; Bin-Da Liu; Tin-Chung Chang (Comput. Aided Des., 1995)

On the hardware design for DES cipher in tamper resistant devices against differential fault analysis. - Lih-Yang Wang; Chi-Sung Laih; Hang-Geng Tsai; Nern-Min Huang (ISCAS, 2000)

Graph-theory-based simplex algorithm for VLSI layout spacingproblems with multiple variable constraints. - Lih-Yang Wang; Yen-Tai Lai (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001)

Quad-Tree-Based Image Shape Coding with Block Compensation. - Lih-Yang Wang; Ching-Hui Lai; Kuan-Ren Pan (ICITA (1), 2005)

On the Improvement of Remote Authentication Scheme with Smart Cards. - Lih-Yang Wang; Chao-Chih Chen (SECRYPT, 2007)

A Praying Gesture Recognition System Based on TinyML. - Chun-Hung Yang; Hui-Yen Lin; Ting-Kuei Chang; Ping-Chen Tsai; Lih-Yang Wang; Yung-Ming Kuo (ICCE-Taiwan, 2024)