Efficient Wait-Free Implementation of a Concurrent Priority Queue. - Amos Israeli; Lihu Rappoport (WDAG, 1993)

Disjoint-Access-Parallel Implementations of Strong Shared Memory Primitives. - Amos Israeli; Lihu Rappoport (PODC, 1994)

On the Robustness of h^r_m. - Shlomo Moran; Lihu Rappoport (WDAG, 1996)

Lock-Free implementations in the asynchronous shared-memory model. - Lihu Rappoport (1996)

Correlated Load-Address Predictors. - Michael Bekerman; Stéphan Jourdan; Ronny Ronen; Gilad Kirshenboim; Lihu Rappoport; Adi Yoaz; Uri C. Weiser (ISCA, 1999)

eXtended Block Cache. - Stéphan Jourdan; Lihu Rappoport; Yoav Almog; Mattan Erez; Adi Yoaz; Ronny Ronen (HPCA, 2000)

Inside 6th gen Intel® Core™: New microarchitecture code named skylake. - Ittai Anati; David Blythe; Jack Doweck; Hong Jiang; Wen-Fu Kao; Julius Mandelblat; Lihu Rappoport; Efraim Rotem; Ahmad Yasin (Hot Chips Symposium, 2016)

Inside 6th-Generation Intel Core: New Microarchitecture Code-Named Skylake. - Jack Doweck; Wen-Fu Kao; Allen Kuan-yu Lu; Julius Mandelblat; Anirudha Rahatekar; Lihu Rappoport; Efraim Rotem; Ahmad Yasin; Adi Yoaz (IEEE Micro, 2017)

Towards the adoption of Local Branch Predictors in Modern Out-of-Order Superscalar Processors. - Niranjan Soundararajan; Saurabh Gupta; Ragavendra Natarajan; Jared Stark; Rahul Pal; Franck Sala; Lihu Rappoport; Adi Yoaz; Sreenivas Subramoney (MICRO, 2019)

Focused Value Prediction. - Sumeet Bandishte; Jayesh Gaur; Zeev Sperber; Lihu Rappoport; Adi Yoaz; Sreenivas Subramoney (ISCA, 2020)

Auto-Predication of Critical Branches. - Adarsh Chauhan; Jayesh Gaur; Zeev Sperber; Franck Sala; Lihu Rappoport; Adi Yoaz; Sreenivas Subramoney (ISCA, 2020)

Intel Alder Lake CPU Architectures. - Efraim Rotem; Adi Yoaz; Lihu Rappoport; Stephen J. Robinson; Julius Yuli Mandelblat; Arik Gihon; Eliezer Weissmann; Rajshree Chabukswar; Vadim Basin; Russell Fenger; Monica Gupta; Ahmad Yasin (IEEE Micro, 2022)