Design and implementation of a low Power Java Coprocessor for dual-interface IC Bank Card. - Junwei He; Liji Wu; Xiangmin Zhang (ASICON, 2011)

New power rail ESD clamp design with current starving technology. - Bo Li; Liji Wu; Xiangmin Zhang (ASICON, 2011)

Reflection analysis of signal transmission in 32-bit CPU based SiP. - Zerong Tao; Liji Wu; Xiangmin Zhang (ASICON, 2011)

Research on testing of 32-bit CPU based SiP. - Chunlin Xie; Liji Wu; Xiangmin Zhang (ASICON, 2011)

A low-power 433MHz transmitter for battery-less Tire Pressure Monitoring System. - Jinyu Zhu; Liji Wu; Xiangmin Zhang; Chen Jia; Chun Zhang (ASICON, 2011)

A passive UHF tag for RFID-based train axle temperature measurement system. - Jianqin Qian; Chun Zhang; Liji Wu; Xijin Zhao; Dingguo Wei; Zhihao Jiang; Yuhui He (CICC, 2011)

Design and Implementation of an Electromagnetic Analysis System for Smart Cards. - Kun Gu; Liji Wu; Xiangyu Li 002; Xiangxin Zhang (CIS, 2011)

A Configurable IPSec Processor for High Performance In-Line Security Network Processor. - Yun Niu; Liji Wu; Li Wang; Xiangmin Zhang; Jun Xu (CIS, 2011)

A Low Power LDO Design for Battery-Less TPMS. - Wenli Yang; Liji Wu; Chen Jia; Xiangmin Zhang (ICFCE, 2011)

Design and Implementation of a Fault Attack Platform for Smart IC Card. - Jun Guo; Liji Wu; Xiangming Zhang; Xiangyu Li 002 (CIS, 2012)

Design of Monitor and Protect Circuits against FIB Attack on Chip Security. - Mengmeng Ling; Liji Wu; Xiangyu Li 002; Xiangmin Zhang; Jinsong Hou; Yong Wang (CIS, 2012)

A High-Speed SHA-1 IP Core for 10 Gbps Ethernet Security Processor. - Yang Liu; Liji Wu; Yun Niu; Xiangmin Zhang; Zhiqiang Gao (CIS, 2012)

A Battery-less Tire Pressure Monitoring System. - Liji Wu; Xiangmin Zhang; Xiao Yu; Xuyang Ding; Chaojun Chi (ICCVE, 2012)

Mixed-signal SoC design and low power research for tire pressure monitoring systems. - Yangyang Guo; Liji Wu; Tengfei Zhai; Xiao Yu; Xiangmin Zhang (ASICON, 2013)

Design of 13.56MHz power recovery circuit with signal transmission for contactless bank IC card. - Yang Li; Liji Wu; Xiangmin Zhang (ASICON, 2013)

Design and implementation of RSA for dual interface bank IC card. - Jiajia Shao; Liji Wu; Xiangmin Zhang (ASICON, 2013)

A novel ESD device for Whole-Chip ESD protection network of TPMS mixed signal SoC. - Ningyuan Yin; Liji Wu; Tengfei Zhai; Xiangmin Zhang; Rui Zhu (ASICON, 2013)

A 10-Gb/s simplified transceiver with a quarter-rate 4-tap decision feedback equalizer in 0.18-μm CMOS technology. - Shuai Yuan 005; Ziqiang Wang; Xuqiang Zheng; Ke Huang 003; Liji Wu; Zhihua Wang 001 (ASICON, 2013)

Efficient Countermeasures against Fault Attacks for 3DES Crypto Engine in Bank IC Card. - Qian Wang 022; Liji Wu; Xiangmin Zhang; Xiangyu Li 002; Jun Guo (CIS, 2013)

A 10Gbps in-line Network Security Processor with a 32-bit embedded CPU. - Jie Bai; Liji Wu; Niu Yun; Yang Liu; Xiangmin Zhang (WOCC, 2013)

Power analysis attacks on wireless sensor nodes using CPU smart card. - Yanting Ren; Liji Wu (WOCC, 2013)

A security vulnerability of Java Card on array access in financial system. - Jiang-pei Xu; Liji Wu; Xiang-jun Yang; Yu-zhong Wang; Xiangmin Zhang (WOCC, 2013)

An IPSec Accelerator Design for a 10Gbps In-Line Security Network Processor. - Yun Niu; Liji Wu; Xiangmin Zhang (J. Comput., 2013)

A 10 Gbps in-line network security processor based on configurable hetero-multi-cores. - Yun Niu; Liji Wu; Yang Liu; Xiangmin Zhang; Hong Yi Chen (J. Zhejiang Univ. Sci. C, 2013)

Algorithm-Based Countermeasures against Power Analysis Attacks for Public-Key Cryptography SM2. - Xiaowei Han; Beibei Wang; An Wang 001; Liji Wu; Woogeun Rhee (CIS, 2014)

Hardware Design and Implementation of SM3 Hash Algorithm for Financial IC Card. - Ye Hu; Liji Wu; An Wang 001; Beibei Wang (CIS, 2014)

Adaptive Chosen-Plaintext Correlation Power Analysis. - Wenjing Hu; Liji Wu; An Wang 001; Xinjun Xie; Zhihui Zhu; Shun Luo (CIS, 2014)

Design of a Masked S-Box for SM4 Based on Composite Field. - Hao Liang; Liji Wu; Xiangmin Zhang; Jiabin Wang (CIS, 2014)

Wavelet-Based Noise Reduction in Power Analysis Attack. - Wei Liu; Liji Wu; Xiangmin Zhang; An Wang 001 (CIS, 2014)

A Novel Subspace Template Attack Based on Symmetric Cross Entropy Criterion. - Fei Song; Liji Wu; An Wang 001; Xinyu Zhao (CIS, 2014)

A Novel Template Attack on wNAF Algorithm of ECC. - Zhenbin Zhang; Liji Wu; Zhaoli Mu; Xiangmin Zhang (CIS, 2014)

Scalable behavior modeling for SCR based ESD protection structures for circuit simulation. - Li Wang 058; Rui Ma 003; Chen Zhang 017; Zongyu Dong; Fei Lu 004; Albert Z. Wang; Xin Wang 031; Jian Liu 027; Siqiang Fan; He Tang; Baoyong Chi; Liji Wu; et al. (ISCAS, 2014)

Improved Leakage Model Based on Genetic Algorithm. - Zhenbin Zhang; Liji Wu; An Wang 001; Zhaoli Mu (IACR Cryptol. ePrint Arch., 2014)

A 4.8-mW/Gb/s 9.6-Gb/s 5 + 1-Lane Source-Synchronous Transmitter in 65-nm Bulk CMOS. - Shuai Yuan 005; Ziqiang Wang; Xuqiang Zheng; Ke Huang 003; Ni Xu; Woogeun Rhee; Liji Wu; Chun Zhang (IEEE Trans. Circuits Syst. II Express Briefs, 2014)

A novel oscillator-based TRNG for smart IC card. - Xiaoyan Jia; Liji Wu; Beibei Wang; Xiangmin Zhang (ASICON, 2015)

A 125KHz low frequency power recovery circuit for battery-less TPMS SoC. - Yi Wang; Liji Wu; Zhi-Yuan Tu; Xiangmin Zhang; Wen Jia (ASICON, 2015)

Transient-Steady Effect Attack on Block Ciphers. - Yanting Ren; An Wang 001; Liji Wu (CHES, 2015)

A 4×20-Gb/s 0.86pJ/b/lane 2-tap-FFE source-series-terminated transmitter with far-end crosstalk cancellation and divider-less clock generation in 65nm CMOS. - Shuai Yuan 005; Liji Wu; Ziqiang Wang; Xuqiang Zheng; Wen Jia; Chun Zhang; Zhihua Wang 001 (CICC, 2015)

Software Hardware Co-design for Side-Channel Analysis Platform on Security Chips. - Qian Lei; Liji Wu; Shaohui Zhang; Xiangmin Zhang; Xiangyu Li 002; Liyang Pan; Zhimeng Dong (CIS, 2015)

A Novel Detection Algorithm for Ring Oscillator Network Based Hardware Trojan Detection with Tactful FPGA Implementation. - Kaige Qu; Liji Wu; Xiangmin Zhang (CIS, 2015)

A Template Attack-Resistant Masking Scheme for RC4 Based on FPGA. - Shaohui Zhang; Liji Wu; Xiangmin Zhang; Xingjun Wu; Xiangyu Li 002; Huajun Fang (CIS, 2015)

A 48mW 15-to-28Gb/s source-synchronous receiver with adaptive DFE using hybrid alternate clock scheme and baud-rate CDR in 65nm CMOS. - Shuai Yuan 005; Liji Wu; Ziqiang Wang; Xuqiang Zheng; Peng Wang; Wen Jia; Chun Zhang; Zhihua Wang 001 (ESSCIRC, 2015)

Template attack on masking AES based on fault sensitivity analysis. - Qian Wang 022; An Wang 001; Liji Wu; Gang Qu 001; Guoshuang Zhang (HOST, 2015)

Efficient collision attacks on smart card implementations of masked AES. - An Wang 001; Zongyue Wang; Xuexin Zheng; Xiaomei Wang; Man Chen; Guoshuang Zhang; Liji Wu (Sci. China Inf. Sci., 2015)

A high-performance elliptic curve cryptographic coprocessor with side channel analysis countermeasures for smart IC card. - Xiaowei Han; Beibei Wang; Liji Wu; An Wang 001 (IEICE Electron. Express, 2015)

Double Sieve Collision Attack Based on Bitwise Detection. - Yanting Ren; Liji Wu; An Wang 001 (KSII Trans. Internet Inf. Syst., 2015)

A novel bit scalable leakage model based on genetic algorithm. - Zhenbin Zhang; Liji Wu; An Wang 001; Zhaoli Mu; Xiangmin Zhang (Secur. Commun. Networks, 2015)

Research on Side Channel Attack for USB Key. - Qingshuang Han; Liji Wu; Xiangmin Zhang (CIS, 2016)

A Novel Method of Correlation Power Analysis on SM4 Hardware Implementation. - Sulong Tang; Liji Wu; Xiangmin Zhang; Xingjun Wu; Beibei Wang (CIS, 2016)

A High Precision Multi-Cell Battery Voltage Detecting Circuit for Battery Management Systems. - Xue-Cheng Man; Liji Wu; Xiangmin Zhang; Tai-Kun Ma; Wen Jia (VTC Spring, 2016)

A new zero value attack combined fault sensitivity analysis on masked AES. - Qian Wang 022; An Wang 001; Liji Wu; Jiliang Zhang 002 (Microprocess. Microsystems, 2016)

A 70 mW 25 Gb/s Quarter-Rate SerDes Transmitter and Receiver Chipset With 40 dB of Equalization in 65 nm CMOS Technology. - Shuai Yuan 005; Liji Wu; Ziqiang Wang; Xuqiang Zheng; Chun Zhang; Zhihua Wang 001 (IEEE Trans. Circuits Syst. I Regul. Pap., 2016)

An efficient HMAC processor based on the SHA-3 HASH function. - Junhui Li; Liji Wu; Xiangmin Zhang (ASICON, 2017)

Side Channel Attack on SM4 Algorithm with Ensemble Method. - Mengmeng Xu; Liji Wu; Xiangmin Zhang (CIS, 2017)

A 50Gb/s repeater and 2 × 50Gb/s 27-1 PRBS generator. - Dengrong Li; Liji Wu; Shuai Yuan 005; Xiangmin Zhang (ISCAS, 2017)

A 25Gb/s serial-link repeater with receiver equalization and transmitter de-emphasis in 0.13μm SiGe BiCMOS. - Shuai Yuan 005; Liji Wu; Ziqiang Wang; Chun Zhang; Zhihua Wang 001; Hanjun Jiang (MWSCAS, 2017)

An Improved Cross-Coupled NAND Gates PUF for Bank IC Card. - Uyangaa Khuchit; Yonghong Bai; Liji Wu; Xiangmin Zhang (ICCSP, 2018)

A Novel Multiple-Bits Collision Attack Based on Double Detection with Error-Tolerant Mechanism. - Ye Yuan 003; Liji Wu; Yijun Yang; Xiangmin Zhang (Secur. Commun. Networks, 2018)

Research on Temperature Characteristics of IoT Chip Hardware Trojan Based on FPGA. - Junru An; Zhiwei Cui; Zhenhui Zhang; Liji Wu; Xiangmin Zhang (CSPS, 2019)

Hardware Implementation Based on Contact IC Card Scalar Multiplication. - Feng Liang; Yanzhao Yin; Zhenhui Zhang; Liji Wu; Xiangmin Zhang (CSPS, 2019)

Correlation power attack on a message authentication code based on SM3. - Ye Yuan 003; Kaige Qu; Liji Wu; Jia-Wei Ma; Xiangmin Zhang (Frontiers Inf. Technol. Electron. Eng., 2019)

Erratum to "A Novel Multiple-Bits Collision Attack Based on Double Detection with Error-Tolerant Mechanism". - Ye Yuan 003; Liji Wu; Yijun Yang; Xiangmin Zhang (Secur. Commun. Networks, 2019)

Hardware Trojan Detection Combines with Machine Learning: an Isolation Forest-based Detection Method. - Taifeng Hu; Liji Wu; Xiangmin Zhang; Zhaopo Liao (BigDataSE, 2020)

An ultra-low-power 5GHz front end with feedforward body bias LNA and single to double balance subharmonic mixer topology for direct conversion receiver. - Dongquan Huo; Luhong Mao; Liji Wu; Xiangmin Zhang (IEICE Electron. Express, 2020)

Gini-Impurity Index Analysis. - Ye Yuan 003; Liji Wu; Xiangmin Zhang (IEEE Trans. Inf. Forensics Secur., 2021)

A High-precision Current Detection Circuit for Battery Management System. - PuSen Wu; Liji Wu; Hao Xue; Zhenhui Zhang; Byambajav Ragchaa; Xiangmin Zhang (ASICON, 2023)

Grafted Trees Bear Better Fruit: An Improved Multiple-Valued Plaintext-Checking Side-Channel Attack against Kyber. - Jinnuo Li; Chi Cheng; Muyan Shen; Peng Chen; Qian Guo 001; Dongsheng Liu; Liji Wu; Jian Weng 001 (IACR Cryptol. ePrint Arch., 2024)

A Design of Fault-Tolerant Battery Monitoring IC for Electric Vehicles Complying With ISO 26262. - Byambajav Ragchaa; Liji Wu; Xiangmin Zhang (IEEE Open J. Circuits Syst., 2024)

Dual-Rail Precharge Logic-Based Side-Channel Countermeasure for DNN Systolic Array. - Le Wu; Liji Wu; Xiangmin Zhang; Munkhbaatar Chinbat (IEEE Trans. Very Large Scale Integr. Syst., 2024)

An Input Recovery Side-Channel Attack on Dnn Accelerator with Three-Dimensional Power Surface. - Le Wu; Liji Wu; Zhiwei Ba; Xiangmin Zhang (HOST, 2025)