A 3-8bit Reconfigurable Hybrid ADC Architecture with Successive-approximation and Single-slope Stages for Computing in Memory. - Wuyu Fan; Yuandong Li; Li Du; Likai Li; Yuan Du (ISCAS, 2022)

A 500MHz, 0.5% THD With 400mVpp Linear Transimpedance Amplifier (TIA) for Analog Optical and In-memory Computing Applications. - Kuanyu Gu; Zhan Ning; Likai Li; Jingjing Lv; Zhong Zhang; Li Du; Yuan Du (APCCAS, 2024)

Optoelectronic Computing Evaluation and Deployment Platform Based on a 256-MAC Silicon Photonic Chip. - Likai Li; Yichuan Bai; Shengping Liu; Yang Zhao; Sunan He; Yaqing Li; Li Du; Yuan Du (ISCAS, 2024)