Fast Design Space Exploration Method for Reconfigurable Architectures. - Lilian Bossuet; Guy Gogniat; Jean Luc Philippe (Engineering of Reconfigurable Systems and Algorithms, 2003)

Communication Costs Driven Design Space Exploration for Reconfigurable Architectures. - Lilian Bossuet; Guy Gogniat; Jean Luc Philippe (FPL, 2003)

Targeting Tiled Architectures in Design Exploration. - Lilian Bossuet; Wayne P. Burleson; Guy Gogniat; Vikas Anand; Andrew Laffely; Jean Luc Philippe (IPDPS, 2003)

Fast prototyping of reconfigurable architectures from a C program. - Sébastien Bilavarn; Guy Gogniat; Jean Luc Philippe; Lilian Bossuet (ISCAS (5), 2003)

Dynamically Configurable Security for SRAM FPGA Bitstreams. - Lilian Bossuet; Guy Gogniat; Wayne P. Burleson (IPDPS, 2004)

Generic Design Space Exploration for Reconfigurable Architectures. - Lilian Bossuet; Guy Gogniat; Jean Luc Philippe (IPDPS, 2005)

Configurable Computing for High-Security/High-Performance Ambient Systems. - Guy Gogniat; Wayne P. Burleson; Lilian Bossuet (SAMOS, 2005)

A Low Cost Alternative Method for Harmonics Estimation in a BIST Context. - Vincent Fresnaud; Lilian Bossuet; Dominique Dallet; Serge Bernard; Jean-Marie Janik; B. Agnus; Philippe Cauvet; Ph. Gandy (ETS, 2006)

An offset and gain calibration method for time-interleaved analog to digital converters. - Maher Jridi; Guillaume Monnerie; Lilian Bossuet; Dominique Dallet (ICECS, 2006)

Design Space Pruning Through Early Estimations of Area/Delay Tradeoffs for FPGA Implementations. - Sébastien Bilavarn; Guy Gogniat; Jean Luc Philippe; Lilian Bossuet (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006)

Exploration de l'espace de conception des architectures reconfigurables. - Lilian Bossuet; Guy Gogniat; Jean Luc Philippe (Tech. Sci. Informatiques, 2006)

Mathematical functions based watermarking for IPP. - Bertrand Le Gal; Lilian Bossuet; Dominique Dallet (ICECS, 2007)

HLS design flow for the synthesis of multimode systems under multiple constraints. - Bertrand Le Gal; Lilian Bossuet; Shafqat Khan; Emmanuel Casseau (ICECS, 2007)

Communication-Oriented Design Space Exploration for Reconfigurable Architectures. - Lilian Bossuet; Guy Gogniat; Jean Luc Philippe (EURASIP J. Embed. Syst., 2007)

Orthogonal correction implementation for time interleaved analog-to-digital converters: Realtime application. - Guillaume Ferré; Bertrand Le Gal; Lilian Bossuet; Maher Jridi; Dominique Dallet; Pierre Colucci (EUSIPCO, 2008)

A new orthogonal online digital calibration for time-interleaved analog-to-digital converters. - Guillaume Ferré; Maher Jridi; Lilian Bossuet; Bertrand Le Gal; Dominique Dallet (ISCAS, 2008)

Reconfigurable Hardware for High-Security/ High-Performance Embedded Systems: The SAFES Perspective. - Guy Gogniat; Tilman Wolf; Wayne P. Burleson; Jean-Philippe Diguet; Lilian Bossuet; Romain Vaslin (IEEE Trans. Very Large Scale Integr. Syst., 2008)

Area optimization of ROM-based controllers dedicated to digital signal processing applications. - Bertrand Le Gal; Aurélien Ribon; Lilian Bossuet; Dominique Dallet (EUSIPCO, 2010)

A low-area filter bank design methodology for on-chip ADC testing. - Nicolas Mechouk; Dominique Dallet; Lilian Bossuet; Bertrand Le Gal (ICECS, 2010)

HCrypt: A Novel Concept of Crypto-processor with Secured Key Management. - Lubos Gaspar; Viktor Fischer; Florent Bernard; Lilian Bossuet; Pascal Cotret (ReConFig, 2010)

Reducing and smoothing power consumption of ROM-based controller implementations. - Bertrand Le Gal; Aurélien Ribon; Lilian Bossuet; Dominique Dallet (SBCCI, 2010)

Design and Implementation of a Multi-Core Crypto-Processor for Software Defined Radios. - Michael Grand; Lilian Bossuet; Bertrand Le Gal; Guy Gogniat; Dominique Dallet (ARC, 2011)

Cryptographic Extension for Soft General-Purpose Processors with Secure Key Management. - Lubos Gaspar; Viktor Fischer; Lilian Bossuet; Milos Drutarovský (FPL, 2011)

A Reconfigurable Multi-core Cryptoprocessor for Multi-channel Communication Systems. - Michael Grand; Lilian Bossuet; Guy Gogniat; Bertrand Le Gal; Jean-Philippe Delahaye; Dominique Dallet (IPDPS Workshops, 2011)

Secure extensions of FPGA soft core processors for symmetric key cryptography. - Lubos Gaspar; Viktor Fischer; Lilian Bossuet; Robert Fouquet (ReCoSoC, 2011)

Fast Digital Post-Processing Technique for Integral Nonlinearity Correction of Analog-to-Digital Converters: Validation on a 12-Bit Folding-and-Interpolating Analog-to-Digital Converter. - Vincent Kerzerho; Vincent Fresnaud; Dominique Dallet; Serge Bernard; Lilian Bossuet (IEEE Trans. Instrum. Meas., 2011)

Contactless Electromagnetic Active Attack on Ring Oscillator Based True Random Number Generator. - Pierre Bayon; Lilian Bossuet; Alain Aubert; Viktor Fischer; François Poucheret; Bruno Robisson; Philippe Maurine (COSADE, 2012)

An Easy-to-Design PUF Based on a Single Oscillator: The Loop PUF. - Zouha Cherif; Jean-Luc Danger; Sylvain Guilley; Lilian Bossuet (DSD, 2012)

Automatic low-cost IP watermarking technique based on output mark insertions. - Bertrand Le Gal; Lilian Bossuet (Des. Autom. Embed. Syst., 2012)

Secure Extension of FPGA General Purpose Processors for Symmetric Key Cryptography with Partial Reconfiguration Capabilities. - Lubos Gaspar; Viktor Fischer; Lilian Bossuet; Robert Fouquet (ACM Trans. Reconfigurable Technol. Syst., 2012)

Teaching FPGA security. - Lilian Bossuet (FPT, 2013)

Evaluation of delay PUFs on CMOS 65 nm technology: ASIC vs FPGA. - Zouha Cherif; Jean-Luc Danger; Florent Lozach; Yves Mathieu; Lilian Bossuet (HASP@ISCA, 2013)

Electromagnetic analysis on ring oscillator-based true random number generators. - Pierre Bayon; Lilian Bossuet; Alain Aubert; Viktor Fischer (ISCAS, 2013)

Architectures of flexible symmetric key crypto engines - a survey: From hardware coprocessor to multi-crypto-processor system on chip. - Lilian Bossuet; Michael Grand; Lubos Gaspar; Viktor Fischer; Guy Gogniat (ACM Comput. Surv., 2013)

New paradigms for access control in constrained environments. - Abdelkarim Cherkaoui; Lilian Bossuet; Ludwig Seitz; Göran Selander; Ravishankar Borgaonkar (ReCoSoC, 2014)

IP watermark verification based on power consumption analysis. - Cédric Marchand 002; Lilian Bossuet; Edward Jung (SoCC, 2014)

Electromagnetic analysis and fault injection onto secure circuits. - Paolo Maistri; Régis Leveugle; Lilian Bossuet; Alain Aubert; Viktor Fischer; Bruno Robisson; Nicolas Moro; Philippe Maurine; Jean-Max Dutertre; Mathieu Lisart (VLSI-SoC, 2014)

Survey of hardware protection of design data for integrated circuits and intellectual properties. - Brice Colombier; Lilian Bossuet (IET Comput. Digit. Tech., 2014)

Sustainable electronics: On the trail of reconfigurable computing. - Lilian Bossuet (Sustain. Comput. Informatics Syst., 2014)

A PUF Based on a Transient Effect Ring Oscillator and Insensitive to Locking Phenomenon. - Lilian Bossuet; Xuan Thuy Ngo; Zouha Cherif; Viktor Fischer (IEEE Trans. Emerg. Top. Comput., 2014)

Functional Locking Modules for Design Protection of Intellectual Property Cores. - Brice Colombier; Lilian Bossuet (FCCM, 2015)

Reversible Denial-of-Service by Locking Gates Insertion for IP Cores Design Protection. - Brice Colombier; Lilian Bossuet; David Hély (ISVLSI, 2015)

Identification of embedded control units by state encoding and power consumption analysis. - Edward Jung; Cédric Marchand 002; Lilian Bossuet (SAC, 2015)

Electromagnetic Transmission of Intellectual Property Data to Protect FPGA Designs. - Lilian Bossuet; Pierre Bayon; Viktor Fischer (VLSI-SoC (Selected Papers), 2015)

Contactless transmission of intellectual property data to protect FPGA designs. - Lilian Bossuet; Viktor Fischer; Pierre Bayon (VLSI-SoC, 2015)

An Ultra-Lightweight Transmitter for Contactless Rapid Identification of Embedded IP in FPGA. - Lilian Bossuet; Pierre Bayon; Viktor Fischer (IEEE Embed. Syst. Lett., 2015)

Disposable configuration of remotely reconfigurable systems. - Lilian Bossuet; Viktor Fischer; Lubos Gaspar; Lionel Torres; Guy Gogniat (Microprocess. Microsystems, 2015)

Hardware security: From concept to application. - Florent Bruguier; Pascal Benoit; Lionel Torres; Lilian Bossuet (EWME, 2016)

Enhanced TERO-PUF Implementations and Characterization on FPGAs (Abstract Only). - Cédric Marchand 002; Lilian Bossuet; Abdelkarim Cherkaoui (FPGA, 2016)

A survey of AIS-20/31 compliant TRNG cores suitable for FPGA devices. - Oto Petura; Ugo Mureddu; Nathalie Bochard; Viktor Fischer; Lilian Bossuet (FPL, 2016)

Electromagnetic security tests for SoC. - Fabien Majéric; Eric Bourbao; Lilian Bossuet (ICECS, 2016)

Design and Characterization of the TERO-PUF on SRAM FPGAs. - Cédric Marchand 002; Lilian Bossuet; Abdelkarim Cherkaoui (ISVLSI, 2016)

Gossip NoC - Avoiding Timing Side-Channel Attacks through Traffic Management. - Cezar Reinbrecht; Altamiro Amadeu Susin; Lilian Bossuet; Johanna Sepúlveda (ISVLSI, 2016)

JTAG Combined Attack - Another Approach for Fault Injection. - Fabien Majéric; Benoit Gonzalvo; Lilian Bossuet (NTMS, 2016)

Side channel attack on NoC-based MPSoCs are practical: NoC Prime+Probe attack. - Cezar Reinbrecht; Altamiro Amadeu Susin; Lilian Bossuet; Georg Sigl; Martha Johanna Sepúlveda (SBCCI, 2016)

Fault model of electromagnetic attacks targeting ring oscillator-based true random number generators. - Pierre Bayon; Lilian Bossuet; Alain Aubert; Viktor Fischer (J. Cryptogr. Eng., 2016)

Introduction to Special Issue on Trustworthy Manufacturing and Utilization of Secure Devices (TRUDEVICE). - Lilian Bossuet; Giorgio Di Natale; Paris Kitsos (Microprocess. Microsystems, 2016)

From secured logic to IP protection. - Brice Colombier; Lilian Bossuet; David Hély (Microprocess. Microsystems, 2016)

Identification of IP control units by state encoding and side channel verification. - Edward Jung; Lilian Bossuet; Seonho Choi; Cédric Marchand 002 (Microprocess. Microsystems, 2016)

ELmD: A Pipelineable Authenticated Encryption and Its Hardware Implementation. - Lilian Bossuet; Nilanjan Datta; Cuauhtemoc Mancillas-López; Mridul Nandi (IEEE Trans. Computers, 2016)

Comments on "A PUF-FSM Binding Scheme for FPGA IP Protection and Pay-per-Device Licensing". - Lilian Bossuet; Brice Colombier (IEEE Trans. Inf. Forensics Secur., 2016)

Design, Evaluation, and Optimization of Physical Unclonable Functions Based on Transient Effect Ring Oscillators. - Abdelkarim Cherkaoui; Lilian Bossuet; Cédric Marchand 002 (IEEE Trans. Inf. Forensics Secur., 2016)

Complete activation scheme for FPGA-oriented IP cores design protection. - Brice Colombier; Ugo Mureddu; Marek Laban; Oto Petura; Lilian Bossuet; Viktor Fischer (FPL, 2017)

A comprehensive hardware/software infrastructure for IP cores design protection. - Brice Colombier; Lilian Bossuet; Ugo Mureddu; David Hély (FPT, 2017)

Centrality Indicators for Efficient and Scalable Logic Masking. - Brice Colombier; Lilian Bossuet; David Hély (ISVLSI, 2017)

Efficient design of Oscillator based Physical Unclonable Functions on Flash FPGAs. - Ugo Mureddu; Oto Petura; Nathalie Bochard; Lilian Bossuet; Viktor Fischer (IVSW, 2017)

On the security evaluation of the ARM TrustZone extension in a heterogeneous SoC. - El Mehdi Benhani; Cédric Marchand 002; Alain Aubert; Lilian Bossuet (SoCC, 2017)

Restoration protocol: Lightweight and secur devices authentication based on PUF. - Brisbane Ovilla-Martinez; Lilian Bossuet (VLSI-SoC, 2017)

Area-oriented comparison of lightweight block ciphers implemented in hardware for the activation mechanism in the anti-counterfeiting schemes. - Cédric Marchand 002; Lilian Bossuet; Kris Gaj (Int. J. Circuit Theory Appl., 2017)

Timing attack on NoC-based systems: Prime+Probe attack and NoC-based protection. - Cezar Reinbrecht; Altamiro Amadeu Susin; Lilian Bossuet; Georg Sigl; Johanna Sepúlveda (Microprocess. Microsystems, 2017)

Key Reconciliation Protocols for Error Correction of Silicon PUF Responses. - Brice Colombier; Lilian Bossuet; Viktor Fischer; David Hély (IEEE Trans. Inf. Forensics Secur., 2017)

DVFS as a Security Failure of TrustZone-enabled Heterogeneous SoC. - El Mehdi Benhani; Lilian Bossuet (ICECS, 2018)

JTAG Fault Injection Attack. - Fabien Majéric; Benoit Gonzalvo; Lilian Bossuet (IEEE Embed. Syst. Lett., 2018)

Implementation and Characterization of a Physical Unclonable Function for IoT: A Case Study With the TERO-PUF. - Cédric Marchand 002; Lilian Bossuet; Ugo Mureddu; Nathalie Bochard; Abdelkarim Cherkaoui; Viktor Fischer (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

Secure Internal Communication of a Trustzone-Enabled Heterogeneous Soc Lightweight Encryption. - El Mehdi Benhani; Cuauhtemoc Mancillas López; Lilian Bossuet (FPT, 2019)

Transient Effect Ring Oscillators Leak Too. - Ugo Mureddu; Brice Colombier; Nathalie Bochard; Lilian Bossuet; Viktor Fischer (ISVLSI, 2019)

Methodology for Efficient CNN Architectures in Profiling Attacks. - Gabriel Zaid; Lilian Bossuet; Amaury Habrard; Alexandre Venelli (IACR Cryptol. ePrint Arch., 2019)

The Security of ARM TrustZone in a FPGA-Based SoC. - El Mehdi Benhani; Lilian Bossuet; Alain Aubert (IEEE Trans. Computers, 2019)

Experimental Study of Locking Phenomena on Oscillating Rings Implemented in Logic Devices. - Ugo Mureddu; Nathalie Bochard; Lilian Bossuet; Viktor Fischer (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

Online Performance Evaluation of Deep Learning Networks for Profiled Side-Channel Analysis. - Damien Robissout; Gabriel Zaid; Brice Colombier; Lilian Bossuet; Amaury Habrard (COSADE, 2020)

Backtracking Search for Optimal Parameters of a PLL-based True Random Number Generator. - Brice Colombier; Nathalie Bochard; Florent Bernard; Lilian Bossuet (DATE, 2020)

Cross Layer Fault Simulations for Analyzing the Robustness of RTL Designs in Airborne Systems. - Julie Roux; Vincent Beroulle; Katell Morin-Allory; Régis Leveugle; Lilian Bossuet; Frédéric Cézilly; Frédéric Berthoz; Gilles Genévrier; François Cerisier (DDECS, 2020)

Physical Security of Ring-based PUF. - Lilian Bossuet (ECCTD, 2020)

High Level Fault Injection Method for Evaluating Critical System Parameter Ranges. - Julie Roux; Vincent Beroulle; Katell Morin-Allory; Régis Leveugle; Lilian Bossuet; Frédéric Cézilly; Frédéric Berthoz; Gilles Genévrier; François Cerisier (ICECS, 2020)

Message-recovery Laser Fault Injection Attack on Code-based Cryptosystems. - Pierre-Louis Cayrel; Brice Colombier; Vlad-Florin Dragoi; Alexandre Menu; Lilian Bossuet (IACR Cryptol. ePrint Arch., 2020)

Online Performance Evaluation of Deep Learning Networks for Side-Channel Analysis. - Damien Robissout; Gabriel Zaid; Brice Colombier; Lilian Bossuet; Amaury Habrard (IACR Cryptol. ePrint Arch., 2020)

Ranking Loss: Maximizing the Success Rate in Deep Learning Side-Channel Analysis. - Gabriel Zaid; Lilian Bossuet; François Dassance; Amaury Habrard; Alexandre Venelli (IACR Cryptol. ePrint Arch., 2020)

Understanding Methodology for Efficient CNN Architectures in Profiling Attacks. - Gabriel Zaid; Lilian Bossuet; Amaury Habrard; Alexandre Venelli (IACR Cryptol. ePrint Arch., 2020)

Pipelined Hardware Implementation of COPA, ELmD, and COLM. - Lilian Bossuet; Cuauhtemoc Mancillas-López; Brisbane Ovilla-Martinez (IEEE Trans. Computers, 2020)

Multi-Spot Laser Fault Injection Setup: New Possibilities for Fault Injection Attacks. - Brice Colombier; Paul Grandamme; Julien Vernay; Émilie Chanavat; Lilian Bossuet; Lucie de Laulanié; Bruno Chassagne (CARDIS, 2021)

Message-Recovery Laser Fault Injection Attack on the Classic McEliece Cryptosystem. - Pierre-Louis Cayrel; Brice Colombier; Vlad-Florin Dragoi; Alexandre Menu; Lilian Bossuet (EUROCRYPT (2), 2021)

Virtual Platform to Analyze the Security of a System on Chip at Microarchitectural Level. - Quentin Forcioli; Jean-Luc Danger; Clémentine Maurice; Lilian Bossuet; Florent Bruguier; Maria Mushtaq; David Novo; Loïc France; Pascal Benoit; Sylvain Guilley; Thomas Perianin (EuroS&P Workshops, 2021)

Security Assessment of Heterogeneous SoC-FPGA: On the Practicality of Cache Timing Attacks. - Lilian Bossuet; El Mehdi Benhani (VLSI-SoC, 2021)

FMEA on Critical Systems: A Cross-Layer Approach Based on High-Level Models. - Julie Roux; Katell Morin-Allory; Vincent Beroulle; Lilian Bossuet; Frédéric Cézilly; Frédéric Berthoz; Gilles Genévrier; François Cerisier; Régis Leveugle (VLSI-SoC (Selected Papers), 2021)

Cross-layer Approach to Assess FMEA on Critical Systems and Evaluate High-Level Model Realism. - Julie Roux; Katell Morin-Allory; Vincent Beroulle; Régis Leveugle; Lilian Bossuet; Frédéric Cézilly; Frédéric Berthoz; Gilles Genévrier; François Cerisier (VLSI-SoC, 2021)

The use of ellipse-based estimator as a sub-key distinguisher for Side-Channel Analysis. - Alberto F. Martínez-Herrera; J. Carlos Mex-Perera; Cuauhtemoc Mancillas-López; Carolina Del-Valle-Soto; Lilian Bossuet (Comput. Electr. Eng., 2021)

Improving Deep Learning Networks for Profiled Side-Channel Analysis Using Performance Improvement Techniques. - Damien Robissout; Lilian Bossuet; Amaury Habrard; Vincent Grosso (IACR Cryptol. ePrint Arch., 2021)

Efficiency through Diversity in Ensemble Models applied to Side-Channel Attacks - A Case Study on Public-Key Algorithms -. - Gabriel Zaid; Lilian Bossuet; Amaury Habrard; Alexandre Venelli (IACR Cryptol. ePrint Arch., 2021)

Self-timed Masking: Implementing Masked S-Boxes Without Registers. - Mateus Simoes; Lilian Bossuet; Nicolas Bruneau; Vincent Grosso; Patrick Haddad; Thomas Sarno (CARDIS, 2022)

SecDec: Secure Decode Stage thanks to masking of instructions with the generated signals. - Gaëtan Leplus; Olivier Savry; Lilian Bossuet (DSD, 2022)

Insertion of random delay with context-aware dummy instructions generator in a RISC-V processor. - Gaëtan Leplus; Olivier Savry; Lilian Bossuet (HOST, 2022)

Self-Timed Masking: Implementing First-Order Masked S-Boxes Without Registers. - Mateus Simoes; Lilian Bossuet; Nicolas Bruneau; Vincent Grosso; Patrick Haddad (IACR Cryptol. ePrint Arch., 2022)

Conditional Variational AutoEncoder based on Stochastic Attack. - Gabriel Zaid; Lilian Bossuet; Mathieu Carbone; Amaury Habrard; Alexandre Venelli (IACR Cryptol. ePrint Arch., 2022)

Emulating Covert Data Transmission on Heterogeneous SoCs. - Lilian Bossuet; Carlos Andres Lara-Nino (AsianHOST, 2023)

TrustSoC: Light and Efficient Heterogeneous SoC Architecture, Secure-by-design. - Raphaële Milan; Lilian Bossuet; Loïc Lagadec; Carlos Andres Lara-Nino; Brice Colombier (AsianHOST, 2023)

Deep Stacking Ensemble Learning Applied to Profiling Side-Channel Attacks. - Dorian Llavata; Eleonora Cagli; Rémi Eyraud; Vincent Grosso; Lilian Bossuet (CARDIS, 2023)

Emulating Side Channel Attacks on gem5: lessons learned. - Lilian Bossuet; Vincent Grosso; Carlos Andres Lara-Nino (EuroS&P Workshops, 2023)

Combined Internal Attacks on SoC-FPGAs: Breaking AES with Remote Power Analysis and Frequency-based Covert Channels. - Anis Fellah-Touta; Lilian Bossuet; Carlos Andres Lara-Nino (EuroS&P Workshops, 2023)

Advanced Covert-Channels in Modern SoCs. - Lilian Bossuet; Carlos Andres Lara-Nino (HOST, 2023)

Low-Latency Masking with Arbitrary Protection Order Based on Click Elements. - Mateus Simões; Lilian Bossuet; Nicolas Bruneau; Vincent Grosso; Patrick Haddad; Thomas Sarno (HOST, 2023)

BALoo: First and Efficient Countermeasure Dedicated to Persistent Fault Attacks. - Pierre-Antoine Tissot; Lilian Bossuet; Vincent Grosso (IOLTS, 2023)

Secured-by-design systems-on-chip: a MBSE Approach. - Raphaële Milan; Loïc Lagadec; Théotime Bollengier; Lilian Bossuet; Ciprian Teodorov (RSP, 2023)

Conditional Variational AutoEncoder based on Stochastic Attacks. - Gabriel Zaid; Lilian Bossuet; Mathieu Carbone; Amaury Habrard; Alexandre Venelli (IACR Trans. Cryptogr. Hardw. Embed. Syst., 2023)

A Lightweight Non-Oscillatory Delay-Sensor for Remote Power Analysis. - Anis Fellah-Touta; Lilian Bossuet; Carlos Andres Lara-Nino (HOST, 2024)

Lightweight Active Fences for FPGAs. - Anis Fellah-Touta; Lilian Bossuet; Vincent Grosso; Carlos Andres Lara-Nino (VLSI-SoC, 2024)

Masked Computation of the Floor Function and Its Application to the FALCON Signature. - Pierre-Augustin Berthet; Justine Paillet; Cédric Tavernier; Lilian Bossuet; Brice Colombier (IACR Commun. Cryptol., 2024)

Switching Off your Device Does Not Protect Against Fault Attacks. - Paul Grandamme; Pierre-Antoine Tissot; Lilian Bossuet; Jean-Max Dutertre; Brice Colombier; Vincent Grosso (IACR Cryptol. ePrint Arch., 2024)

Scoring the predictions: a way to improve profiling side-channel attacks. - Damien Robissout; Lilian Bossuet; Amaury Habrard (J. Cryptogr. Eng., 2024)

High-Confidence Remote Power Analysis on Heterogeneous SoCs. - Anis Fellah-Touta; Lilian Bossuet; Carlos Andres Lara-Nino (J. Hardw. Syst. Secur., 2024)

Classification of S-Boxes According to Hardware Implementation Cost. - Pierre-Antoine Tissot; Vincent Grosso; Lilian Hubert Bossuet (CF (Companion), 2025)

Low-Latency FFT/iFFT RTL Implementation for the FALCON Post-Quantum Signature Algorithm. - Alexandre Ortega; Lilian Bossuet; Brice Colombier (FCCM, 2025)

Unsupervised Horizontal Attacks against Public-Key Primitives with DCCA: - From Deep Canonical Correlation Analysis to Deep Collision Correlation Attacks -. - Dorian Llavata; Eleonora Cagli; Rémi Eyraud; Vincent Grosso; Lilian Bossuet (IACR Commun. Cryptol., 2025)

Improving the Masked Division for the FALCON Signature. - Pierre-Augustin Berthet; Justine Paillet; Cédric Tavernier; Lilian Bossuet; Brice Colombier (IACR Cryptol. ePrint Arch., 2025)

Power and Frequency Intrinsic Channels on gem5. - Lilian Bossuet; Carlos Andres Lara-Nino (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)

Efficient Adaptive Multi-Level Privilege Partitioning With RTrustSoC. - Raphaële Milan; Lilian Bossuet; Loïc Lagadec; Carlos Andres Lara-Nino; Brice Colombier; Théotime Bollengier (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)