15.4 A 5.99-to-691.1TOPS/W Tensor-Train In-Memory-Computing Processor Using Bit-Level-Sparsity-Based Optimization and Variable-Precision Quantization. - Ruiqi Guo; Zhiheng Yue; Xin Si; Te Hu; Hao Li; Limei Tang; Yabing Wang; Leibo Liu; Meng-Fan Chang; Qiang Li 021; Shaojun Wei; Shouyi Yin (ISSCC, 2021)

A 6.54-to-26.03 TOPS/W Computing-In-Memory RNN Processor using Input Similarity Optimization and Attention-based Context-breaking with Output Speculation. - Ruiqi Guo; Hao Li; Ruhui Liu; Zhixiao Zhang; Limei Tang; Hao Sun; Leibo Liu; Meng-Fan Chang; Shaojun Wei; Shouyi Yin (VLSI Circuits, 2021)

CV-CIM: A 28nm XOR-Derived Similarity-Aware Computation-in-Memory for Cost-Volume Construction. - Zhiheng Yue; Yang Wang 089; Huizheng Wang; Yabing Wang; Ruiqi Guo; Limei Tang; Leibo Liu; Shaojun Wei; Yang Hu 001; Shouyi Yin (ISSCC, 2023)

TT@CIM: A Tensor-Train In-Memory-Computing Processor Using Bit-Level-Sparsity Optimization and Variable Precision Quantization. - Ruiqi Guo; Zhiheng Yue; Xin Si; Hao Li; Te Hu; Limei Tang; Yabing Wang; Hao Sun; Leibo Liu; Meng-Fan Chang; Qiang Li 021; Shaojun Wei; et al. (IEEE J. Solid State Circuits, 2023)