An architecture of high-performance frequency and phase synthesis. - Hugh Mair; Liming Xiu (IEEE J. Solid State Circuits, 2000)

A "flying-adder" architecture of frequency and phase synthesis with scalability. - Liming Xiu; Zhihong You (IEEE Trans. Very Large Scale Integr. Syst., 2002)

A new frequency synthesis method based on "flying-adder" architecture. - Liming Xiu; Zhihong You (IEEE Trans. Circuits Syst. II Express Briefs, 2003)

A novel all-digital PLL with software adaptive filter. - Liming Xiu; Wen Li; J. Meiners; R. Padakanti (IEEE J. Solid State Circuits, 2004)

A "Flying-Adder" frequency synthesis architecture of reducing VCO stages. - Liming Xiu; Zhihong You (IEEE Trans. Very Large Scale Integr. Syst., 2005)

A "Flying-Adder" On-Chip Frequency Generator for Complex SoC Environment. - Liming Xiu (IEEE Trans. Circuits Syst. II Express Briefs, 2007)

Crack Fault Diagnosis Based on MEP Based Neural Network. - Mingjun Liu; Liming Xiu; Guangfeng Jia; Yuehui Chen (ISCSCT (1), 2008)

A Novel DCXO Module for Clock Synchronization in MPEG2 Transport System. - Liming Xiu (IEEE Trans. Circuits Syst. I Regul. Pap., 2008)

A Flying-Adder PLL technique enabling novel approaches for video/graphic applications. - Liming Xiu (IEEE Trans. Consumer Electron., 2008)

A Wide-tuning-range and Reduced-fractional-spurs Synthesizer Combining Sigma-Delta Fractional-N and Integer Flying-Adder Techniques. - Chen-Wei Huang; Ping Gui; Liming Xiu (ISCAS, 2009)

Simulation Study of Time-Average-Frequency based Clock Signal Driving Systems with Embedded Digital-to-Analog Converters. - Liming Xiu; Chen-Wei Huang; Ping Gui (ISCAS, 2009)

A Fast and Power-Area-Efficient Accumulator for Flying-Adder Frequency Synthesizer. - Liming Xiu (IEEE Trans. Circuits Syst. I Regul. Pap., 2009)

A comparative study between Fractional-N PLL and Flying-Adder PLL. - Liming Xiu; Chen-Wei Huang; Ping Gui (ISCAS, 2010)

The Effects of Flying-Adder Clocks on Digital-to-Analog Converters. - Ping Gui; Zheng Gao; Chen-Wei Huang; Liming Xiu (IEEE Trans. Circuits Syst. II Express Briefs, 2010)

Analysis of Harmonic Energy Distribution Portfolio for Digital-to-Frequency Converters. - Liming Xiu; Chen-Wei Huang; Ping Gui (IEEE Trans. Instrum. Meas., 2010)

A Storage-Based Carry Randomization Technique for Spurs Reduction in Flying-Adder Frequency Synthesizer. - Liming Xiu; Ming Lin; Hong Jiang (IEEE Trans. Circuits Syst. II Express Briefs, 2011)

The Impact of Input-Mismatch on Flying-Adder Direct Period Synthesizer Output Jitter. - Liming Xiu; Kun-Ho Lin; Ming Lin (IEEE Trans. Circuits Syst. I Regul. Pap., 2012)

Flying-Adder Fractional Divider Based Integer-N PLL: 2nd Generation FAPLL as On-Chip Frequency Generator for SoC. - Liming Xiu; Win-Ting Lin; Tsung-Ta Lee (IEEE J. Solid State Circuits, 2013)

Direct Period Synthesis for Achieving Sub-PPM Frequency Resolution Through Time Average Frequency: The Principle, The Experimental Demonstration, and Its Application in Digital Communication. - Liming Xiu (IEEE Trans. Very Large Scale Integr. Syst., 2015)

All digital FPGA-implementable time-average-frequency direct period synthesis for IoT applications. - Liming Xiu (ISCAS, 2017)

A Reconfigurable TAF-DPS Frequency Synthesizer on FPGA Achieving 2 ppb Frequency Granularity and Two-Cycle Switching Speed. - Liming Xiu; Pao-Lung Chen (IEEE Trans. Ind. Electron., 2017)

A 0.02 Ppb/Step Wide Range DCXO Based on Time-Average-Frequency: Demonstration on FPGA. - Liming Xiu; Xiangye Wei (ISCAS, 2019)

A Full Digital Fractional-N TAF-FLL for Digital Applications: Demonstration of the Principle of a Frequency-Locked Loop Built on Time-Average-Frequency. - Liming Xiu; Xiangye Wei; Yuhai Ma (IEEE Trans. Very Large Scale Integr. Syst., 2019)

An All Digital Highly Programable TAF-DPS Based True Random Number Generator Working on Principles of Frequency-Mixing and Frequency-Tracking. - Xiangye Wei; Liming Xiu (ISCAS, 2020)

A Method of Low-Cost Pure-Digital GPS Disciplined Clock for Improving Frequency Accuracy and Steering Frequency Through TAF-DPS Frequency Synthesizer. - Chenglong Li; Shuisheng Lin; Yiwen Li; Hui Zhang 077; Xiangye Wei; Liming Xiu (IEEE Trans. Instrum. Meas., 2021)

A New Perspective of Inscribing Temporal Encryption on Spatial MPV Imprints for PUF Design. - Xiangye Wei; Liming Xiu (SOCC, 2022)

A New Perspective of Flexible Clocking Ideology for Driving and Devising Circuits in Emerging Resource-Constrained Applications. - Xiangye Wei; Liming Xiu (IEEE Access, 2022)

A VLSI Digital Circuit Platform for Performing Deterministic Stochastic Computing in the Time Dimension Using Fraction Operations on Rational Numbers. - Xiangye Wei; Liming Xiu (IEEE Trans. Emerg. Top. Comput., 2023)

Using All-Digital On-Chip Syntonistor to Compensate Clock Frequency Error in Network Time Synchronization for Accuracy Reaching to Sub-µs Range. - Yiwen Li; Liming Xiu; Xiangye Wei; Shuisheng Lin; Chenglong Li; Hui Zhang 077 (IEEE Trans. Ind. Electron., 2023)

A Perspective of Using Frequency-Mixing as Entropy in Random Number Generation for Portable Hardware Cybersecurity IP. - Xiangye Wei; Liming Xiu; Yimao Cai (IEEE Trans. Inf. Forensics Secur., 2024)

From Space-Central to Space-Time Balanced: A Perspective for Moore's Law 2.0 and a Holistic Paradigm for Emergence [Perspectives]. - Liming Xiu (IEEE Signal Process. Mag., 2024)

A Generic Circuit Platform of Covering All Rational Numbers for Determnistic Stochastic Computing in the Time Dimension. - Xiangye Wei; Junjian Ma; Liming Xiu; Yimao Cai (ISCAS, 2025)