OCMGen: Extended Design Space Exploration with Efficient FPGA Memory Inference. - Sanjay Gandham; Lingxiang Yin; Hao Zheng 005; Mingjie Lin (FCCM, 2023)

Exploring Architecture, Dataflow, and Sparsity for GCN Accelerators: A Holistic Framework. - Lingxiang Yin; Jun Wang 001; Hao Zheng 005 (ACM Great Lakes Symposium on VLSI, 2023)

SAGA: Sparsity-Agnostic Graph Convolutional Network Acceleration with Near-Optimal Workload Balance. - Sanjay Gandham; Lingxiang Yin; Hao Zheng 005; Mingjie Lin (ICCAD, 2023)

ARIES: Accelerating Distributed Training in Chiplet-Based Systems via Flexible Interconnects. - Lingxiang Yin; Amir Ghazizadeh; Ahmed Louri; Hao Zheng 005 (ICCAD, 2023)

Polyform: A Versatile Architecture for Multi-DNN Execution via Spatial and Temporal Acceleration. - Lingxiang Yin; Amir Ghazizadeh; Shilin Tian; Ahmed Louri; Hao Zheng 005 (ICCD, 2023)

EGMA: Enhancing Data Reuse and Workload Balancing in Message Passing GNN Acceleration via Gram Matrix Optimization. - Fangzhou Ye; Lingxiang Yin; Amir Ghazizadeh Ahsaei; Hao Zheng 005 (DAC, 2024)

CircuitSeer: RTL Post-PnR Delay Prediction via Coupling Functional and Structural Representation. - Sanjay Gandham; Joe Walston; Sourav Samanta; Lingxiang Yin; Hao Zheng 005; Mingjie Lin; Stelios Diamantidis (ICCAD, 2024)

SCALE: A Structure-Centric Accelerator for Message Passing Graph Neural Networks. - Lingxiang Yin; Sanjay Gandham; Mingjie Lin; Hao Zheng 005 (MICRO, 2024)