Sub-Word Parallel Precision-Scalable MAC Engines for Efficient Embedded DNN Inference. - Linyan Mei; Mohit Dandekar; Dimitrios Rodopoulos; Jeremy Constantin; Peter Debacker; Rudy Lauwereins; Marian Verhelst (AICAS, 2019)

Review and Benchmarking of Precision-Scalable Multiply-Accumulate Unit Architectures for Embedded Neural-Network Processing. - Vincent Camus; Linyan Mei; Christian C. Enz; Marian Verhelst (IEEE J. Emerg. Sel. Topics Circuits Syst., 2019)

ZigZag: A Memory-Centric Rapid DNN Accelerator Design Space Exploration Framework. - Linyan Mei; Pouya Houshmand; Vikram Jain; Juan Sebastian Piedrahita Giraldo; Marian Verhelst (CoRR, 2020)

Analyzing the Energy-Latency-Area-Accuracy Trade-off Across Contemporary Neural Networks. - Vikram Jain; Linyan Mei; Marian Verhelst (AICAS, 2021)

LOMA: Fast Auto-Scheduling on DNN Accelerators through Loop-Order-based Memory Allocation. - Arne Symons; Linyan Mei; Marian Verhelst (AICAS, 2021)

Processor Architecture Optimization for Spatially Dynamic Neural Networks. - Steven Colleman; Thomas Verelst; Linyan Mei; Tinne Tuytelaars; Marian Verhelst (VLSI-SoC, 2021)

Survey and Benchmarking of Precision-Scalable MAC Arrays for Embedded DNN Processing. - Ehab M. Ibrahim; Linyan Mei; Marian Verhelst (CoRR, 2021)

Hardware-Efficient Residual Neural Network Execution in Line-Buffer Depth-First Processing. - Man Shi; Pouya Houshmand; Linyan Mei; Marian Verhelst (IEEE J. Emerg. Sel. Topics Circuits Syst., 2021)

ZigZag: Enlarging Joint Architecture-Mapping Design Space Exploration for DNN Accelerators. - Linyan Mei; Pouya Houshmand; Vikram Jain; Juan Sebastian Piedrahita Giraldo; Marian Verhelst (IEEE Trans. Computers, 2021)

A Uniform Latency Model for DNN Accelerators with Diverse Architectures and Dataflows. - Linyan Mei; Huichu Liu; Tony F. Wu; Huseyin Ekin Sumbul; Marian Verhelst; Edith Beigné (DATE, 2022)

TinyVers: A 0.8-17 TOPS/W, 1.7 μW-20 mW, Tiny Versatile System-on-chip with State-Retentive eMRAM for Machine Learning Inference at the Extreme Edge. - Vikram Jain; Juan Sebastian Piedrahita Giraldo; Jaro De Roose; Bert Boons; Linyan Mei; Marian Verhelst (VLSI Technology and Circuits, 2022)

CONVOLVE: Smart and seamless design of smart edge processors. - Manil Dev Gomony; Floran de Putter; Anteneh Gebregiorgis; Gianna Paulin; Linyan Mei; Vikram Jain; Said Hamdioui; Victor Sanchez; Tobias Grosser; Marc Geilen; Marian Verhelst; Frank K. Zenke; et al. (CoRR, 2022)

Towards Heterogeneous Multi-core Accelerators Exploiting Fine-grained Scheduling of Layer-Fused Deep Neural Networks. - Arne Symons; Linyan Mei; Steven Colleman; Pouya Houshmand; Sebastian Karl; Marian Verhelst (CoRR, 2022)

Taxonomy and Benchmarking of Precision-Scalable MAC Arrays Under Enhanced DNN Dataflow Representation. - Ehab M. Ibrahim; Linyan Mei; Marian Verhelst (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

DeFiNES: A DSE Framework Enabling Fast Exploration of the Depth-first Scheduling Space for DNN Accelerators. - Linyan Mei; Koen Goetschalckx; Arne Symons; Marian Verhelst (Zenodo, 2022)

SALSA: Simulated Annealing based Loop-Ordering Scheduler for DNN Accelerators. - Victor J. B. Jung; Arne Symons; Linyan Mei; Marian Verhelst; Luca Benini (AICAS, 2023)

PetaOps/W edge-AI $ mu$ Processors: Myth or reality? - Manil Dev Gomony; Floran de Putter; Anteneh Gebregiorgis; Gianna Paulin; Linyan Mei; Vikram Jain; Said Hamdioui; Victor Sanchez; Tobias Grosser; Marc Geilen; Marian Verhelst; Friedemann Zenke; et al. (DATE, 2023)

DeFiNES: Enabling Fast Exploration of the Depth-first Scheduling Space for DNN Accelerators through Analytical Modeling. - Linyan Mei; Koen Goetschalckx; Arne Symons; Marian Verhelst (HPCA, 2023)

ACCO: Automated Causal CNN Scheduling Optimizer for Real-Time Edge Accelerators. - Jun Yin; Linyan Mei; Andre Guntoro; Marian Verhelst (ICCD, 2023)

Stream: A Modeling Framework for Fine-grained Layer Fusion on Multi-core DNN Accelerators. - Arne Symons; Linyan Mei; Steven Colleman; Pouya Houshmand; Sebastian Karl; Marian Verhelst (ISPASS, 2023)

TinyVers: A Tiny Versatile System-on-Chip With State-Retentive eMRAM for ML Inference at the Extreme Edge. - Vikram Jain; Juan Sebastian Piedrahita Giraldo; Jaro De Roose; Linyan Mei; Bert Boons; Marian Verhelst (IEEE J. Solid State Circuits, 2023)

Stream: Design Space Exploration of Layer-Fused DNNs on Heterogeneous Dataflow Accelerators. - Arne Symons; Linyan Mei; Steven Colleman; Pouya Houshmand; Sebastian Karl; Marian Verhelst (IEEE Trans. Computers, 2025)